Change in coreboot[master]: src/soc/intel/common/itss: Add support to get IRQ configuration for P...
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34089 )
Change subject: src/soc/intel/common/itss: Add support to get IRQ configuration for PCI devices ......................................................................
Patch Set 11:
(3 comments)
https://review.coreboot.org/c/coreboot/+/34089/10/src/soc/intel/common/block... File src/soc/intel/common/block/itss/Kconfig:
https://review.coreboot.org/c/coreboot/+/34089/10/src/soc/intel/common/block... PS10, Line 8: depends on SOC_INTEL_CANNONLAKE_BASE || SOC_INTEL_ICELAKE
Ack
Done. Created a CL to explicitly support it from SOC(CNL and ICL) https://review.coreboot.org/c/coreboot/+/34517
https://review.coreboot.org/c/coreboot/+/34089/10/src/soc/intel/common/block... File src/soc/intel/common/block/itss/irq.c:
https://review.coreboot.org/c/coreboot/+/34089/10/src/soc/intel/common/block... PS10, Line 96: memcpy
just irq_config[index] = irq_entry should do it.
Done
https://review.coreboot.org/c/coreboot/+/34089/10/src/soc/intel/common/block... PS10, Line 108: *num_entries = index;
If the buffer is too small, the code that passed the buffer to this function is probably wrong.
Ok, revised the implementation to report error in buffer small case. And the callee function checks for it.
-
Aamir Bohra (Code Review)