Change in coreboot[4.11_branch]: src/soc/intel/fsp_boradwell_de: Update ACPI FADT GPE entries

[Werner Zeh (Code Review)]

Werner Zeh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/54879 )

Change subject: src/soc/intel/fsp_boradwell_de: Update ACPI FADT GPE entries
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src/soc/intel/fsp_boradwell_de: Update ACPI FADT GPE entries

Update the FADT for fwts errors for the GPE entries.
Fix GPE0 access size and remove GPE1 address space ID.

Change-Id: Iea43b534fa119d17cb2bafef8f72d73bcba3a650
Signed-off-by: Marc Jones 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54879
Tested-by: build bot (Jenkins) 
Reviewed-by: Stefan Reinauer 
---
M src/soc/intel/fsp_broadwell_de/acpi.c
1 file changed, 2 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Stefan Reinauer: Looks good to me, approved

diff --git a/src/soc/intel/fsp_broadwell_de/acpi.c b/src/soc/intel/fsp_broadwell_de/acpi.c
index 5349c30..498aee1 100644
--- a/src/soc/intel/fsp_broadwell_de/acpi.c
+++ b/src/soc/intel/fsp_broadwell_de/acpi.c
@@ -271,11 +271,11 @@
    fadt->x_gpe0_blk.space_id        = ACPI_ADDRESS_SPACE_IO;
    fadt->x_gpe0_blk.bit_width       = 64;	/* EventStatus + EventEnable */
    fadt->x_gpe0_blk.bit_offset      = 0;
-	fadt->x_gpe0_blk.access_size     = ACPI_ACCESS_SIZE_DWORD_ACCESS;
+	fadt->x_gpe0_blk.access_size     = ACPI_ACCESS_SIZE_BYTE_ACCESS;
    fadt->x_gpe0_blk.addrl           = fadt->gpe0_blk;
    fadt->x_gpe0_blk.addrh           = 0x00;

-	fadt->x_gpe1_blk.space_id        = ACPI_ADDRESS_SPACE_IO;
+	fadt->x_gpe1_blk.space_id        = 0;
    fadt->x_gpe1_blk.bit_width       = 0;
    fadt->x_gpe1_blk.bit_offset      = 0;
    fadt->x_gpe1_blk.access_size     = 0;