Patch set updated for coreboot: eeb186f southbridge/hudson: Remove unused function set_sm_enable_bits()

[Alexandru Gagniuc]

Alexandru Gagniuc ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5513

-gerrit

commit eeb186f9e24b76683a8b412bfbcbe8069c680abf
Author: Alexandru Gagniuc 
Date:   Thu Apr 17 11:49:42 2014 -0500

southbridge/hudson: Remove unused function set_sm_enable_bits()

This function isn't used on hudson, and seems to be copy-paste from
    older southbridges. It is used in sb700 to enable or disable certain
    PCI devices. On hudson, these configuration bits are moved to the PM
    space.

Change-Id: I9b967a2d0a5dddc8341204dadeed90460251915c
    Signed-off-by: Alexandru Gagniuc 
---
 src/southbridge/amd/agesa/hudson/hudson.c | 11 -----------
 src/southbridge/amd/agesa/hudson/hudson.h |  1 -
 2 files changed, 12 deletions(-)

diff --git a/src/southbridge/amd/agesa/hudson/hudson.c b/src/southbridge/amd/agesa/hudson/hudson.c
index 8289c7f..cd63c3e 100644
--- a/src/southbridge/amd/agesa/hudson/hudson.c
+++ b/src/southbridge/amd/agesa/hudson/hudson.c
@@ -60,17 +60,6 @@ void backup_top_of_ram(uint64_t ramtop)
    }
 }

-void set_sm_enable_bits(device_t sm_dev, u32 reg_pos, u32 mask, u32 val)
-{
-	u32 reg_old, reg;
-	reg = reg_old = pci_read_config32(sm_dev, reg_pos);
-	reg &= ~mask;
-	reg |= val;
-	if (reg != reg_old) {
-		pci_write_config32(sm_dev, reg_pos, reg);
-	}
-}
-
 void pm_write8(u8 reg, u8 value)
 {
    write8(PM_MMIO_BASE + reg, value);
diff --git a/src/southbridge/amd/agesa/hudson/hudson.h b/src/southbridge/amd/agesa/hudson/hudson.h
index 86b4238..683fd28 100644
--- a/src/southbridge/amd/agesa/hudson/hudson.h
+++ b/src/southbridge/amd/agesa/hudson/hudson.h
@@ -63,7 +63,6 @@ void pm_write8(u8 reg, u8 value);
 u8 pm_read8(u8 reg);
 void pm_write16(u8 reg, u16 value);
 u16 pm_read16(u16 reg);
-void set_sm_enable_bits(device_t sm_dev, u32 reg_pos, u32 mask, u32 val);

#ifdef __PRE_RAM__
 void hudson_lpc_port80(void);