build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/15164 )
Change subject: nb/amd/pi/00730F01: Add initial native IVRS support ......................................................................
Patch Set 17:
(75 comments)
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... File src/northbridge/amd/pi/00730F01/northbridge.c:
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 457: if ((dev->bus->secondary == 0x0) && (dev->path.pci.devfn == 0x0)) { line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 457: if ((dev->bus->secondary == 0x0) && (dev->path.pci.devfn == 0x0)) { braces {} are not necessary for single statement blocks
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 466: p[0] = 0x2; /* Entry type */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 467: p[1] = dev->path.pci.devfn; /* Device */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 468: p[2] = dev->bus->secondary; /* Bus */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 469: p[3] = 0x0; /* Data */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 470: p[4] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 471: p[5] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 472: p[6] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 473: p[7] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 480: && (dev->path.pci.devfn < (0x3 << 3))) { line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 483: p[0] = 0x2; /* Entry type */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 484: p[1] = dev->path.pci.devfn; /* Device */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 485: p[2] = dev->bus->secondary; /* Bus */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 486: p[3] = 0x0; /* Data */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 487: p[4] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 488: p[5] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 489: p[6] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 490: p[7] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 496: p[0] = 0x2; /* Entry type */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 497: p[1] = dev->path.pci.devfn; /* Device */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 498: p[2] = dev->bus->secondary; /* Bus */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 499: p[3] = 0x97; /* Data */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 500: p[4] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 501: p[5] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 502: p[6] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 503: p[7] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 509: p[0] = 0x2; /* Entry type */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 510: p[1] = dev->path.pci.devfn; /* Device */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 511: p[2] = dev->bus->secondary; /* Bus */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 512: p[3] = 0x0; /* Data */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 513: p[4] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 514: p[5] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 515: p[6] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 516: p[7] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 521: if ((dev->hdr_type & 0x7f) == PCI_HEADER_TYPE_NORMAL) { line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 523: if (pci_find_capability(dev, PCI_CAP_ID_PCIE)) { line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 526: p[0] = 0x2; /* Entry type */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 527: p[1] = dev->path.pci.devfn; /* Device */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 528: p[2] = dev->bus->secondary; /* Bus */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 529: p[3] = 0x0; /* Data */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 530: p[4] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 531: p[5] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 532: p[6] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 533: p[7] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 537: /* Device is legacy PCI or PCI-X */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 539: p[0] = 0x42; /* Entry type */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 540: p[1] = dev->path.pci.devfn; /* Device */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 541: p[2] = dev->bus->secondary; /* Bus */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 542: p[3] = 0x0; /* Data */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 543: p[4] = 0x0; /* Reserved */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 544: p[5] = parent->path.pci.devfn; /* Device */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 545: p[6] = parent->bus->secondary; /* Bus */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 546: p[7] = 0x0; /* Reserved */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 550: } else if ((dev->hdr_type & 0x7f) == PCI_HEADER_TYPE_BRIDGE) { line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 551: if (pci_find_capability(dev, PCI_CAP_ID_PCIE)) { line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 554: p[0] = 0x2; /* Entry type */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 555: p[1] = dev->path.pci.devfn; /* Device */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 556: p[2] = dev->bus->secondary; /* Bus */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 557: p[3] = 0x0; /* Data */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 558: p[4] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 559: p[5] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 560: p[6] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 561: p[7] = 0x0; /* Padding */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 571: for (sibling = link->children; sibling; sibling = sibling->sibling) line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 572: add_ivrs_device_entries(dev, sibling, depth + 1, depth, root_level, current, length); line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 577: unsigned long acpi_fill_ivrs_ioapic(acpi_ivrs_t* ivrs, unsigned long current) "foo* bar" should be "foo *bar"
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 614: static unsigned long acpi_fill_ivrs(acpi_ivrs_t* ivrs, unsigned long current) "foo* bar" should be "foo *bar"
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 620: printk(BIOS_WARNING, "acpi_fill_ivrs: Unable to locate G-series northbridge device! IVRS table not generated...\n"); Prefer using '"%s...", __func__' to using 'acpi_fill_ivrs', this function's name, in a string
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 625: ivrs->iv_info |= (0x40 << 15); /* Maximum supported virtual address size */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 626: ivrs->iv_info |= (0x30 << 8); /* Maximum supported physical address size */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 631: ivrs->ivhd.flags |= 0x10; /* Enable ATS support */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 633: ivrs->ivhd.device_id = 0x2 | (nb_dev->bus->secondary << 8); /* BDF <bus>:00.2 */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 634: ivrs->ivhd.capability_offset = 0x40; /* Capability block 0x40 (type 0xf, "Secure device") */ line over 80 characters
https://review.coreboot.org/#/c/15164/17/src/northbridge/amd/pi/00730F01/nor... PS17, Line 656: add_ivrs_device_entries(NULL, all_devices, 0, -1, NULL, ¤t, &ivrs->ivhd.length); line over 80 characters
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