John Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62721 )
Change subject: soc/intel/common: Add IOE P2SB for TCSS ......................................................................
soc/intel/common: Add IOE P2SB for TCSS
Meteor Lake has the IOE Die for TCSS. This change adds the IOE P2SB sideband access and exposes API for TCSS usage.
Change-Id: I01f551b6e1f50ebdc1cef2ceee815a492030db19 Signed-off-by: John Zhao john.zhao@intel.com --- M src/soc/intel/common/block/include/intelblocks/p2sb.h M src/soc/intel/common/block/p2sb/Kconfig M src/soc/intel/common/block/p2sb/Makefile.inc A src/soc/intel/common/block/p2sb/ioe_p2sb.c M src/soc/intel/common/block/p2sb/p2sb.c 5 files changed, 74 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/62721/1
diff --git a/src/soc/intel/common/block/include/intelblocks/p2sb.h b/src/soc/intel/common/block/include/intelblocks/p2sb.h index b330ccd..b8aa5bc 100644 --- a/src/soc/intel/common/block/include/intelblocks/p2sb.h +++ b/src/soc/intel/common/block/include/intelblocks/p2sb.h @@ -29,6 +29,10 @@ void p2sb_enable_bar(void); void p2sb_configure_hpet(void);
+void ioe_p2sb_enable_bar(void); +uint32_t ioe_p2sb_sbi_read(uint8_t pid, uint16_t reg); +void ioe_p2sb_sbi_write(uint8_t pid, uint16_t reg, uint32_t val); + union p2sb_bdf { struct { uint16_t fn : 3; diff --git a/src/soc/intel/common/block/p2sb/Kconfig b/src/soc/intel/common/block/p2sb/Kconfig index 7f292cd..eedc583 100644 --- a/src/soc/intel/common/block/p2sb/Kconfig +++ b/src/soc/intel/common/block/p2sb/Kconfig @@ -3,3 +3,9 @@ depends on SOC_INTEL_COMMON_BLOCK_PCR help Intel Processor common P2SB driver + +config SOC_INTEL_COMMON_BLOCK_IOE_P2SB + def_bool n + depends on SOC_INTEL_COMMON_BLOCK_PCR + help + Intel Processor common IOE P2SB driver diff --git a/src/soc/intel/common/block/p2sb/Makefile.inc b/src/soc/intel/common/block/p2sb/Makefile.inc index 5c6378e..d9ea0b8 100644 --- a/src/soc/intel/common/block/p2sb/Makefile.inc +++ b/src/soc/intel/common/block/p2sb/Makefile.inc @@ -6,3 +6,9 @@ smm-y += p2sb.c smm-y += p2sblib.c endif + +ifeq ($(CONFIG_SOC_INTEL_COMMON_BLOCK_IOE_P2SB),y) +bootblock-y += ioe_p2sb.c +ramstage-y += ioe_p2sb.c +ramstage-y += p2sblib.c +endif diff --git a/src/soc/intel/common/block/p2sb/ioe_p2sb.c b/src/soc/intel/common/block/p2sb/ioe_p2sb.c new file mode 100644 index 0000000..312ec37 --- /dev/null +++ b/src/soc/intel/common/block/p2sb/ioe_p2sb.c @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#define __SIMPLE_DEVICE__ + +#include <console/console.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <intelblocks/p2sb.h> +#include <intelblocks/p2sblib.h> +#include <intelblocks/pcr.h> +#include <soc/iomap.h> +#include <soc/pci_devs.h> + +uint32_t ioe_p2sb_sbi_read(uint8_t pid, uint16_t reg) +{ + return p2sb_dev_sbi_read(PCI_DEV_IOE_P2SB, pid, reg); +} + +void ioe_p2sb_sbi_write(uint8_t pid, uint16_t reg, uint32_t val) +{ + p2sb_dev_sbi_write( PCI_DEV_IOE_P2SB, pid, reg, val); +} + +void ioe_p2sb_enable_bar(void) +{ + /* Enable PCR Base address */ + pci_write_config32(PCI_DEV_IOE_P2SB, PCI_BASE_ADDRESS_0, + (uint32_t)IOE_P2SB_BAR); + pci_write_config32(PCI_DEV_IOE_P2SB, PCI_BASE_ADDRESS_1, + (uint32_t)(IOE_P2SB_BAR >> 32)); + + /* Enable P2SB MSE */ + pci_write_config16(PCI_DEV_IOE_P2SB, PCI_COMMAND, + PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); +} + +static void read_resources(struct device *dev) +{ + mmio_resource(dev, 0, IOE_P2SB_BAR / KiB, IOE_P2SB_SIZE / KiB); +} + +struct device_operations device_ops = { + .read_resources = read_resources, + .set_resources = noop_set_resources, + .ops_pci = &pci_dev_ops_pci, +}; + +static const unsigned short pci_device_ids[] = { + PCI_DID_INTEL_MTL_IOE_M_P2SB, + PCI_DID_INTEL_MTL_IOE_P_P2SB, + 0, +}; + +static const struct pci_driver ioe_p2sb __pci_driver = { + .ops = &device_ops, + .vendor = PCI_VENDOR_ID_INTEL, + .devices = pci_device_ids, +}; diff --git a/src/soc/intel/common/block/p2sb/p2sb.c b/src/soc/intel/common/block/p2sb/p2sb.c index 94db33d..ef3b88e 100644 --- a/src/soc/intel/common/block/p2sb/p2sb.c +++ b/src/soc/intel/common/block/p2sb/p2sb.c @@ -145,8 +145,6 @@
static const unsigned short pci_device_ids[] = { PCI_DID_INTEL_MTL_SOC_P2SB, - PCI_DID_INTEL_MTL_IOE_M_P2SB, - PCI_DID_INTEL_MTL_IOE_P_P2SB, PCI_DID_INTEL_APL_P2SB, PCI_DID_INTEL_GLK_P2SB, PCI_DID_INTEL_LWB_P2SB,
-
John Zhao (Code Review)