Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46340 )
Change subject: soc/intel/broadwell: Define RCBA register LCAP ......................................................................
soc/intel/broadwell: Define RCBA register LCAP
This register has a name. Use it.
Change-Id: I952584c4aa92fc917d2fc0ef174ee12ae3eeee81 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/broadwell/finalize.c M src/soc/intel/broadwell/include/soc/rcba.h 2 files changed, 4 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/46340/1
diff --git a/src/soc/intel/broadwell/finalize.c b/src/soc/intel/broadwell/finalize.c index 5539f61..a13c214 100644 --- a/src/soc/intel/broadwell/finalize.c +++ b/src/soc/intel/broadwell/finalize.c @@ -97,8 +97,8 @@ /* Lock */ RCBA32_OR(0x3a6c, 0x00000001);
- /* Read+Write the following register */ - RCBA32(0x21a4) = RCBA32(0x21a4); + /* Read+Write this R/WO register */ + RCBA32(LCAP) = RCBA32(LCAP);
/* Indicate finalize step with post code */ post_code(POST_OS_BOOT); diff --git a/src/soc/intel/broadwell/include/soc/rcba.h b/src/soc/intel/broadwell/include/soc/rcba.h index 3bacb9d..0c63eb2 100644 --- a/src/soc/intel/broadwell/include/soc/rcba.h +++ b/src/soc/intel/broadwell/include/soc/rcba.h @@ -48,6 +48,8 @@ #define PIRQG 6 #define PIRQH 7
+#define LCAP 0x21a4 + /* IO Buffer Programming */ #define IOBPIRI 0x2330 #define IOBPD 0x2334
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46340 )
Change subject: soc/intel/broadwell: Define RCBA register LCAP ......................................................................
Patch Set 1: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/46340/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46340/1//COMMIT_MSG@9 PS1, Line 9: This register has a name. Use it. 😄
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46340 )
Change subject: soc/intel/broadwell: Define RCBA register LCAP ......................................................................
Patch Set 3: Code-Review+2
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46340 )
Change subject: soc/intel/broadwell: Define RCBA register LCAP ......................................................................
soc/intel/broadwell: Define RCBA register LCAP
This register has a name. Use it.
Change-Id: I952584c4aa92fc917d2fc0ef174ee12ae3eeee81 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/46340 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de Reviewed-by: HAOUAS Elyes ehaouas@noos.fr --- M src/soc/intel/broadwell/finalize.c M src/soc/intel/broadwell/include/soc/rcba.h 2 files changed, 4 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved HAOUAS Elyes: Looks good to me, but someone else must approve
diff --git a/src/soc/intel/broadwell/finalize.c b/src/soc/intel/broadwell/finalize.c index af72074..4196144 100644 --- a/src/soc/intel/broadwell/finalize.c +++ b/src/soc/intel/broadwell/finalize.c @@ -95,8 +95,8 @@ /* Lock */ RCBA32_OR(0x3a6c, 0x00000001);
- /* Read+Write the following register */ - RCBA32(0x21a4) = RCBA32(0x21a4); + /* Read+Write this R/WO register */ + RCBA32(LCAP) = RCBA32(LCAP);
/* Indicate finalize step with post code */ post_code(POST_OS_BOOT); diff --git a/src/soc/intel/broadwell/include/soc/rcba.h b/src/soc/intel/broadwell/include/soc/rcba.h index 3bacb9d..0c63eb2 100644 --- a/src/soc/intel/broadwell/include/soc/rcba.h +++ b/src/soc/intel/broadwell/include/soc/rcba.h @@ -48,6 +48,8 @@ #define PIRQG 6 #define PIRQH 7
+#define LCAP 0x21a4 + /* IO Buffer Programming */ #define IOBPIRI 0x2330 #define IOBPD 0x2334
-
Angel Pons (Code Review) -
HAOUAS Elyes (Code Review)
-
Nico Huber (Code Review)