Change in coreboot[master]: mb/google/brya: Mark the WWAN device as an UntrustedDevice

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61628 )

Change subject: mb/google/brya: Mark the WWAN device as an UntrustedDevice
......................................................................

mb/google/brya: Mark the WWAN device as an UntrustedDevice

The ChromiumOS kernel has the ability to restrict devices to their own
IOMMU security domains when ACPI passes this property to a device
downstream of a PCIe RP.

BUG=b:215424986
TEST=verified the property is found and WWAN is restricted to its own
IOMMU domain as expected.

Signed-off-by: Tim Wawrzynczak 
Change-Id: I1717c0976d1d961772245fd420368fe5a9c1262e
---
M src/mainboard/google/brya/Kconfig
M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
2 files changed, 5 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/61628/1

diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index c0b8a34..14a34ab 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -14,6 +14,7 @@
    select DRIVERS_INTEL_PMC
    select DRIVERS_INTEL_SOUNDWIRE
    select DRIVERS_INTEL_USB4_RETIMER
+	select DRIVERS_PCIE_GENERIC
    select DRIVERS_SOUNDWIRE_ALC5682
    select DRIVERS_SOUNDWIRE_MAX98373
    select DRIVERS_SPI_ACPI
diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
index ee0fbce..060f1fd 100644
--- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
@@ -161,6 +161,10 @@
    			.clk_req = 5,
    			.flags = PCIE_RP_LTR | PCIE_RP_AER,
    		}"
+			chip drivers/pcie/generic
+				register "is_untrusted" = "1"
+				device pci 0 on end
+			end
    	end	#PCIE6 WWAN
    	device ref pcie_rp8 on
    		# Enable SD Card PCIE 8 using clk 3