[XS] Change in coreboot[main]: soc/intel/ptl: Disable FSP_UGOP_EARLY_SIGN_OF_LIFE for PTL

[Subrata Banik (Code Review)]

Attention is currently required from: Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N.

Subrata Banik has posted comments on this change by Jayvik Desai. ( https://review.coreboot.org/c/coreboot/+/86314?usp=email )

Change subject: soc/intel/ptl: Disable FSP_UGOP_EARLY_SIGN_OF_LIFE for PTL
......................................................................

Patch Set 1:

(4 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/86314/comment/5a5cb13a_c595ca0a?usp... :
PS1, Line 9: Disable ESOL for PTL until the feature is ready and tested.
nit ?

This patch disables eSOL Kconfig until the feature is ready in PTL FSP-uGOP binary

https://review.coreboot.org/c/coreboot/+/86314/comment/32bd9b68_830dc181?usp... :
PS1, Line 11: BUG=none
not needed

https://review.coreboot.org/c/coreboot/+/86314/comment/bbe6bb4b_3c94493b?usp... :
PS1, Line 12: emerge-fatcat coreboot
Able to built and boot google/fatcat to OS.

https://review.coreboot.org/c/coreboot/+/86314/comment/9c8109bf_01c14a14?usp... :
PS1, Line 13: BRANCH=none
not needed