Hello Seunghwan Kim,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/37587
to review the following change.
Change subject: mb/google/kohaku: Update TCC offset setting ......................................................................
mb/google/kohaku: Update TCC offset setting
This change sets TCC offset to 10 for kohaku.
BUG=b:144532818 BRANCH=firmware-hatch-12672.B TEST=Checked thermal and performance efficiency internally (b:144532818)
Change-Id: Ia4b53de3a53bc39c1cd0f7626ae23d4c11a7a3db Signed-off-by: Seunghwan Kim sh_.kim@samsung.com --- M src/mainboard/google/hatch/variants/kohaku/overridetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/37587/1
diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb index 55ac071..84d3cf2a0 100644 --- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb @@ -2,7 +2,7 @@ register "tdp_pl1_override" = "8" register "tdp_pl2_override" = "51"
- register "tcc_offset" = "35" # TCC of 65C + register "tcc_offset" = "10" # TCC of 90C
register "SerialIoDevMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci,
Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37587 )
Change subject: mb/google/kohaku: Update TCC offset setting ......................................................................
Patch Set 1: Code-Review+1
Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37587 )
Change subject: mb/google/kohaku: Update TCC offset setting ......................................................................
Patch Set 1: -Code-Review
Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37587 )
Change subject: mb/google/kohaku: Update TCC offset setting ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37587/1/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/kohaku/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/37587/1/src/mainboard/google/hatch/... PS1, Line 5: tcc_offset variants/baseboard/devicetree.cb baseboard already has 10. do you still need to set this? or you can remove it and use baseboard setting directly. thanks.
Hello Seunghwan Kim, Ryan Lin, Kane Chen, Tim Wawrzynczak, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37587
to look at the new patch set (#2).
Change subject: mb/google/kohaku: Update TCC offset setting ......................................................................
mb/google/kohaku: Update TCC offset setting
This change sets TCC offset to 10 for kohaku.
BUG=b:144532818 BRANCH=firmware-hatch-12672.B TEST=Checked thermal and performance efficiency internally (b:144532818)
Change-Id: Ia4b53de3a53bc39c1cd0f7626ae23d4c11a7a3db Signed-off-by: Seunghwan Kim sh_.kim@samsung.com --- M src/mainboard/google/hatch/variants/kohaku/overridetree.cb 1 file changed, 0 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/37587/2
shkim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37587 )
Change subject: mb/google/kohaku: Update TCC offset setting ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37587/1/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/kohaku/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/37587/1/src/mainboard/google/hatch/... PS1, Line 5: tcc_offset
variants/baseboard/devicetree.cb […]
Done. Thanks.
Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37587 )
Change subject: mb/google/kohaku: Update TCC offset setting ......................................................................
Patch Set 2: Code-Review+1
Grace Kao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37587 )
Change subject: mb/google/kohaku: Update TCC offset setting ......................................................................
Patch Set 2: Code-Review+1
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37587 )
Change subject: mb/google/kohaku: Update TCC offset setting ......................................................................
Patch Set 2: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37587 )
Change subject: mb/google/kohaku: Update TCC offset setting ......................................................................
mb/google/kohaku: Update TCC offset setting
This change sets TCC offset to 10 for kohaku.
BUG=b:144532818 BRANCH=firmware-hatch-12672.B TEST=Checked thermal and performance efficiency internally (b:144532818)
Change-Id: Ia4b53de3a53bc39c1cd0f7626ae23d4c11a7a3db Signed-off-by: Seunghwan Kim sh_.kim@samsung.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/37587 Reviewed-by: Kane Chen kane.chen@intel.com Reviewed-by: Grace Kao grace.kao@intel.com Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/hatch/variants/kohaku/overridetree.cb 1 file changed, 0 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Kane Chen: Looks good to me, but someone else must approve Grace Kao: Looks good to me, but someone else must approve Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb index d515ecc..cd5ce0e 100644 --- a/src/mainboard/google/hatch/variants/kohaku/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kohaku/overridetree.cb @@ -2,8 +2,6 @@ register "tdp_pl1_override" = "8" register "tdp_pl2_override" = "51"
- register "tcc_offset" = "35" # TCC of 65C - register "SerialIoDevMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, [PchSerialIoIndexI2C1] = PchSerialIoPci,