Change in coreboot[master]: soc/intel/denverton_ns: Use common SMM save state ops

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37017 )

Change subject: soc/intel/denverton_ns: Use common SMM save state ops
......................................................................

soc/intel/denverton_ns: Use common SMM save state ops

Change-Id: Ieb5baaa4e36d97414d87addf5c8e318b881e8996
Signed-off-by: Arthur Heymans 
---
M src/soc/intel/denverton_ns/smihandler.c
1 file changed, 36 insertions(+), 28 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/37017/1

diff --git a/src/soc/intel/denverton_ns/smihandler.c b/src/soc/intel/denverton_ns/smihandler.c
index c292e4d..ce0022f 100644
--- a/src/soc/intel/denverton_ns/smihandler.c
+++ b/src/soc/intel/denverton_ns/smihandler.c
@@ -23,7 +23,6 @@
 #include <console/console.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/smm.h>
-#include <cpu/intel/em64t100_save_state.h>
 #include <device/pci_def.h>
 #include <intelblocks/fast_spi.h>
 #include <spi-generic.h>
@@ -168,35 +167,39 @@
  * core in case we are not running on the same core that
  * initiated the IO transaction.
  */
-static em64t100_smm_state_save_area_t *smi_apmc_find_state_save(uint8_t cmd)
+static int smi_apmc_find_state_save_node(u8 cmd)
 {
-	em64t100_smm_state_save_area_t *state;
+	const struct smm_save_state_ops *ops = get_save_state_ops();
    int node;

/* Check all nodes looking for the one that issued the IO */
    for (node = 0; node < CONFIG_MAX_CPUS; node++) {
-		state = smm_get_save_state(node);
-
-		/* Check for Synchronous IO (bit0==1) */
-		if (!(state->io_misc_info & (1 << 0)))
-			continue;
-
-		/* Make sure it was a write (bit4==0) */
-		if (state->io_misc_info & (1 << 4))
-			continue;
-
-		/* Check for APMC IO port */
-		if (((state->io_misc_info >> 16) & 0xff) != APM_CNT)
-			continue;
-
+		uint32_t io_misc_info;
+		uint64_t rax;
+		if (ops->get_reg(node, RAX, &rax))
+			continue; /* ??? */
    	/* Check AX against the requested command */
-		if ((state->rax & 0xff) != cmd)
+		if ((rax & 0xff) != cmd)
    		continue;
+		if (ops->get_io_misc_info(node, &io_misc_info)) {

-		return state;
+			/* Check for Synchronous IO (bit0 == 1) */
+			if (!(io_misc_info & (1 << 0)))
+				continue;
+
+			/* Make sure it was a write (bit4 == 0) */
+			if (io_misc_info & (1 << 4))
+				continue;
+
+			/* Check for APMC IO port */
+			if (((io_misc_info >> 16) & 0xff) != APM_CNT)
+				continue;
+		}
+
+		return node;
    }

-	return NULL;
+	return -1;
 }

static void finalize(void)
@@ -217,7 +220,7 @@
 static void southbridge_smi_apmc(void)
 {
    uint8_t reg8;
-	em64t100_smm_state_save_area_t *state;
+	const struct smm_save_state_ops *ops = get_save_state_ops();

/* Emulate B2 register as the FADT / Linux expects it */

@@ -254,13 +257,18 @@
    		       "SMI#: SMM structures already initialized!\n");
    		return;
    	}
-		state = smi_apmc_find_state_save(reg8);
-		if (state) {
-			/* EBX in the state save contains the GNVS pointer */
-			gnvs = (global_nvs_t *)((uint32_t)state->rbx);
-			smm_initialized = 1;
-			printk(BIOS_DEBUG, "SMI#: Setting GNVS to %p\n", gnvs);
-		}
+		int node = smi_apmc_find_state_save_node(APM_CNT_GNVS_UPDATE);
+		if (node < -1)
+			return;
+
+		uint64_t rbx;
+		if (ops->get_reg(node, RBX, &rbx))
+			return;
+
+		/* EBX in the state save contains the GNVS pointer */
+		gnvs = (global_nvs_t *)(u32)rbx;
+		smm_initialized = 1;
+		printk(BIOS_DEBUG, "SMI#: Setting GNVS to %p\n", gnvs);
    	break;
    }

[Arthur Heymans (Code Review)]

Arthur Heymans has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/37017 )

Change subject: soc/intel/denverton_ns: Use common SMM save state ops
......................................................................

Abandoned

superseded in common_smm_save_state