Attention is currently required from: Angel Pons, Arthur Heymans, Paul Menzel, Saurabh Mishra, Subrata Banik.
Ashish Kumar Mishra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82079?usp=email )
Change subject: block/fast_spi: Use read32p/write32p for spi rw
......................................................................
Patch Set 2:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/82079/comment/7d6d5038_f57dadb4 :
PS2, Line 7: spi
SPI
Acknowledged
https://review.coreboot.org/c/coreboot/+/82079/comment/3de658cd_a203fade :
PS2, Line 9: impl.
No need to abbreviate words in the commit message.
Acknowledged
https://review.coreboot.org/c/coreboot/+/82079/comment/eadc88d1_ac3129a1 :
PS2, Line 15: TEST=Build and boot mtl 64-bit and verified MRC cache working.
Any boot time difference?
MRC verification passed during warmboot and cbmem verified.
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