Jonathan Zhang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44402 )
Change subject: soc/intel/xeon_sp/cpx: remove unsupported configs ......................................................................
soc/intel/xeon_sp/cpx: remove unsupported configs
coherency_support and ats_support are not supported by CPX-SP FSP.
Remove them from soc_intel_xeon_sp_cpx_config struct.
Remove corresponding settings from DeltaLake devicetree.cb.
Signed-off-by: Jonathan Zhang jonzhang@fb.com Change-Id: Ibe1c4e88817fc4be7915e95fa829f0a4c0d947f2 --- M src/mainboard/ocp/deltalake/devicetree.cb M src/soc/intel/xeon_sp/cpx/chip.h 2 files changed, 0 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/44402/1
diff --git a/src/mainboard/ocp/deltalake/devicetree.cb b/src/mainboard/ocp/deltalake/devicetree.cb index f77a214..24a2850 100644 --- a/src/mainboard/ocp/deltalake/devicetree.cb +++ b/src/mainboard/ocp/deltalake/devicetree.cb @@ -33,9 +33,6 @@ # configure PSTATE_REQ_RATIO for MSR_IA32_PERF_CTRL register "pstate_req_ratio" = "0xa"
- register "coherency_support" = "0" - register "ats_support" = "0" - register "gen1_dec" = "0x00fc0601" # BIC in-band update support register "gen2_dec" = "0x000c0ca1" # IPMI KCS
diff --git a/src/soc/intel/xeon_sp/cpx/chip.h b/src/soc/intel/xeon_sp/cpx/chip.h index e46f34f..aa605a4 100644 --- a/src/soc/intel/xeon_sp/cpx/chip.h +++ b/src/soc/intel/xeon_sp/cpx/chip.h @@ -84,9 +84,6 @@
uint32_t pstate_req_ratio;
- uint32_t coherency_support; - uint32_t ats_support; - /* Generic IO decode ranges */ uint32_t gen1_dec; uint32_t gen2_dec;
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44402 )
Change subject: soc/intel/xeon_sp/cpx: remove unsupported configs ......................................................................
Patch Set 1: Code-Review+2
Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44402 )
Change subject: soc/intel/xeon_sp/cpx: remove unsupported configs ......................................................................
Patch Set 1: Code-Review+2
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44402 )
Change subject: soc/intel/xeon_sp/cpx: remove unsupported configs ......................................................................
soc/intel/xeon_sp/cpx: remove unsupported configs
coherency_support and ats_support are not supported by CPX-SP FSP.
Remove them from soc_intel_xeon_sp_cpx_config struct.
Remove corresponding settings from DeltaLake devicetree.cb.
Signed-off-by: Jonathan Zhang jonzhang@fb.com Change-Id: Ibe1c4e88817fc4be7915e95fa829f0a4c0d947f2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44402 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/mainboard/ocp/deltalake/devicetree.cb M src/soc/intel/xeon_sp/cpx/chip.h 2 files changed, 0 insertions(+), 6 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Maxim Polyakov: Looks good to me, approved
diff --git a/src/mainboard/ocp/deltalake/devicetree.cb b/src/mainboard/ocp/deltalake/devicetree.cb index f77a214..24a2850 100644 --- a/src/mainboard/ocp/deltalake/devicetree.cb +++ b/src/mainboard/ocp/deltalake/devicetree.cb @@ -33,9 +33,6 @@ # configure PSTATE_REQ_RATIO for MSR_IA32_PERF_CTRL register "pstate_req_ratio" = "0xa"
- register "coherency_support" = "0" - register "ats_support" = "0" - register "gen1_dec" = "0x00fc0601" # BIC in-band update support register "gen2_dec" = "0x000c0ca1" # IPMI KCS
diff --git a/src/soc/intel/xeon_sp/cpx/chip.h b/src/soc/intel/xeon_sp/cpx/chip.h index e46f34f..aa605a4 100644 --- a/src/soc/intel/xeon_sp/cpx/chip.h +++ b/src/soc/intel/xeon_sp/cpx/chip.h @@ -84,9 +84,6 @@
uint32_t pstate_req_ratio;
- uint32_t coherency_support; - uint32_t ats_support; - /* Generic IO decode ranges */ uint32_t gen1_dec; uint32_t gen2_dec;
-
Angel Pons (Code Review) -
Jonathan Zhang (Code Review)
-
Maxim Polyakov (Code Review)