Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81552?usp=email )
(
2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/google/nissa/var/glassway: Add 2nd Synaptics touchpad ......................................................................
mb/google/nissa/var/glassway: Add 2nd Synaptics touchpad
Add Synaptics touchpad via HID-I2C interface in I2C5 bus for glassway.
BUG=b:331677400 BRANCH=firmware-nissa-15217.B TEST=emerge-brya coreboot and check touchpad function work. [INFO ] input: PNP0C50:00 06CB:CE9B Touchpad as /devices/pci0000:00/0000:00:19.1/i2c_designware.5/i2c-17/i2c-PNP0C50:00/0018:06CB:CE9B.0001/input/input4 [INFO ] hid-multitouch 0018:06CB:CE9B.0001: input,hidraw0: I2C HID v1.00 Device [PNP0C50:00 06CB:CE9B] on i2c-PNP0C50:00
Change-Id: Ifbb2cb750a80bc6e8f96609257dcd1e695ad1fa4 Signed-off-by: Frank Chu frank_chu@pegatron.corp-partner.google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/81552 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Eric Lai ericllai@google.com Reviewed-by: Varshit Pandya pandyavarshit@gmail.com --- M src/mainboard/google/brya/variants/glassway/overridetree.cb 1 file changed, 9 insertions(+), 0 deletions(-)
Approvals: Varshit Pandya: Looks good to me, but someone else must approve Eric Lai: Looks good to me, approved build bot (Jenkins): Verified Frank Chu: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/brya/variants/glassway/overridetree.cb b/src/mainboard/google/brya/variants/glassway/overridetree.cb index 29629d4..64c8ee0 100644 --- a/src/mainboard/google/brya/variants/glassway/overridetree.cb +++ b/src/mainboard/google/brya/variants/glassway/overridetree.cb @@ -384,6 +384,15 @@ register "detect" = "1" device i2c 15 on end end + chip drivers/i2c/hid + register "generic.hid" = ""PNP0C50"" + register "generic.desc" = ""PIXART Touchpad"" + register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)" + register "generic.wake" = "GPE0_DW2_14" + register "generic.detect" = "1" + register "hid_desc_reg_offset" = "0x20" + device i2c 2c on end + end end #I2C5 device ref pcie_rp4 on # Enable wlan PCIe 4 using clk 2