Change in ...coreboot[master]: nb/intel/i945: Put stage cache in TSEG - coreboot-gerrit

14 Jan 2019


      HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25603 )
Change subject: nb/intel/i945: Put stage cache in TSEG
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Patch Set 37: Code-Review+1
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I447815bb0acf5f8e53834b74785d496f9d4df1da
Gerrit-Change-Number: 25603
Gerrit-PatchSet: 37
Gerrit-Owner: Arthur Heymans arthur@aheymans.xyz
Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz
Gerrit-Reviewer: HAOUAS Elyes ehaouas@noos.fr
Gerrit-Reviewer: Martin Roth martinroth@google.com
Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net
Gerrit-Reviewer: Stefan Reinauer stefan.reinauer@coreboot.org
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-Comment-Date: Mon, 14 Jan 2019 10:06:06 +0000
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