Change in coreboot[master]: mb/google/volteer/variants/copano: Modify touch controller power sequ...

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52015 )

Change subject: mb/google/volteer/variants/copano: Modify touch controller power sequence
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mb/google/volteer/variants/copano: Modify touch controller power sequence

Based on the measurement, adjust the delay time between the main power rail and reset signal to 7ms in order to match the spec. of touch controller, eKTH7918U.

BUG=b:184126265
BRANCH=firmware-volteer-13672.B
TEST=build test firmware and verified by EE team.

Change-Id: Iea84046c1b1f3fe6ab8bb89d86d00b1e89325f71
Signed-off-by: Hao Chou 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52015
Tested-by: build bot (Jenkins) 
Reviewed-by: Zhuohao Lee 
Reviewed-by: Zhuohao Lee 
Reviewed-by: Wayne3 Wang 
Reviewed-by: Nick Vaccaro 
---
M src/mainboard/google/volteer/variants/copano/overridetree.cb
1 file changed, 1 insertion(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nick Vaccaro: Looks good to me, but someone else must approve
  Zhuohao Lee: Looks good to me, approved
  Zhuohao Lee: Looks good to me, but someone else must approve
  Hao Chou: Looks good to me, but someone else must approve
  Wayne3 Wang: Looks good to me, but someone else must approve

diff --git a/src/mainboard/google/volteer/variants/copano/overridetree.cb b/src/mainboard/google/volteer/variants/copano/overridetree.cb
index b0a108e..ec624d3 100644
--- a/src/mainboard/google/volteer/variants/copano/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/copano/overridetree.cb
@@ -142,6 +142,7 @@
    			register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C10)"
    			register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F16)"
    			register "generic.reset_delay_ms" = "20"
+				register "generic.enable_delay_ms" = "7"
    			register "generic.has_power_resource" = "1"
    			register "generic.disable_gpio_export_in_crs" = "1"
    			register "hid_desc_reg_offset" = "0x01"