Kane Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35596 )
Change subject: mb/google/hatch: Enable PchPmSlpS0Vm075VSupport for hatch ......................................................................
mb/google/hatch: Enable PchPmSlpS0Vm075VSupport for hatch
On hatch and variant HW designs supports VCCPRIM_CORE Low Voltage Mode. VCCPRIM_CORE can be down to 0.75v when slp_s0 is asserted.
This commit enables PchPmSlpS0Vm075VSupport UPD so that FSP can program related setttings to save power.
BUG=b:134092071 TEST=Run suspend_stress_test on kohaku and pass 100 cycles
Change-Id: Ia02ff8823883489b36349457213409496f082f36 Signed-off-by: Kane Chen kane.chen@intel.com --- M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/35596/1
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index 7382209..a2831e1 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -58,6 +58,8 @@
register "PmTimerDisabled" = "1"
+ register "PchPmSlpS0Vm075VSupport" = "1" + # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS |
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35596 )
Change subject: mb/google/hatch: Enable PchPmSlpS0Vm075VSupport for hatch ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35596/2/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/35596/2/src/mainboard/google/hatch/... PS2, Line 61: register "PchPmSlpS0Vm075VSupport" = "1" Don't you also need to set SlpS0VmRuntimeControl?
Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35596 )
Change subject: mb/google/hatch: Enable PchPmSlpS0Vm075VSupport for hatch ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35596/2/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/35596/2/src/mainboard/google/hatch/... PS2, Line 61: register "PchPmSlpS0Vm075VSupport" = "1"
Don't you also need to set SlpS0VmRuntimeControl?
I checked the code, it only needs to enable PchPmSlpS0Vm075VSupport, then FSP will help to config the right settings. thanks
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35596 )
Change subject: mb/google/hatch: Enable PchPmSlpS0Vm075VSupport for hatch ......................................................................
Patch Set 2: Code-Review+2
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35596 )
Change subject: mb/google/hatch: Enable PchPmSlpS0Vm075VSupport for hatch ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35596/2/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/35596/2/src/mainboard/google/hatch/... PS2, Line 61: register "PchPmSlpS0Vm075VSupport" = "1"
I checked the code, it only needs to enable PchPmSlpS0Vm075VSupport, then FSP will help to config th […]
Furquan, given your +2 I'll assume that you're satisfied with that answer ;-)
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35596 )
Change subject: mb/google/hatch: Enable PchPmSlpS0Vm075VSupport for hatch ......................................................................
mb/google/hatch: Enable PchPmSlpS0Vm075VSupport for hatch
On hatch and variant HW designs supports VCCPRIM_CORE Low Voltage Mode. VCCPRIM_CORE can be down to 0.75v when slp_s0 is asserted.
This commit enables PchPmSlpS0Vm075VSupport UPD so that FSP can program related setttings to save power.
BUG=b:134092071 TEST=Run suspend_stress_test on kohaku and pass 100 cycles
Change-Id: Ia02ff8823883489b36349457213409496f082f36 Signed-off-by: Kane Chen kane.chen@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/35596 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com --- M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index 7382209..a2831e1 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -58,6 +58,8 @@
register "PmTimerDisabled" = "1"
+ register "PchPmSlpS0Vm075VSupport" = "1" + # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS |
Kane Chen has created a revert of this change. ( https://review.coreboot.org/c/coreboot/+/35596 )
Change subject: mb/google/hatch: Enable PchPmSlpS0Vm075VSupport for hatch ......................................................................
-
Furquan Shaikh (Code Review) -
Kane Chen (Code Review)
-
Patrick Georgi (Code Review)