Attention is currently required from: Derek Huang, Paul Menzel.
Joey Peng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78146?usp=email )
Change subject: mb/google/dedede/var/boxy: Wait up for 3s for HPD ready signal ......................................................................
Patch Set 7:
(5 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/78146/comment/c7d49ebf_037ad7a8 : PS5, Line 7: Add wait for HPD function
Maybe: […]
Done
https://review.coreboot.org/c/coreboot/+/78146/comment/230bbd4e_360d59ef : PS5, Line 9: need
needs
Done
https://review.coreboot.org/c/coreboot/+/78146/comment/0f6937ad_f06b86e1 : PS5, Line 9: Boxy project need to wait for HPD ready to continue boot in ramstage to : avoid no display in DEV screen and recovery screen
Please add a dot/period at the end of sentences.
Done
File src/mainboard/google/dedede/variants/boxy/ramstage.c:
https://review.coreboot.org/c/coreboot/+/78146/comment/a8315664_1a98cf2e : PS5, Line 67: static const long display_timeout_ms = 3000;
Why 3 seconds?
The three seconds is referenced form project puff. Also we have tested the delay time needs to be more than 3 seconds to work on boxy.
https://review.coreboot.org/c/coreboot/+/78146/comment/7ab99979_523d4ca3 : PS5, Line 69: if (display_init_required() : && !gpio_get(GPIO_USB_C0_HPD)) { : /* This has to be done before FSP-S runs. */ : if (google_chromeec_wait_for_displayport(display_timeout_ms)) { : wait_for_hpd(GPIO_USB_C0_HPD, display_timeout_ms); : } : } else if (display_init_required() : && !gpio_get(GPIO_USB_C1_HPD)) { : /* This has to be done before FSP-S runs. */ : if (google_chromeec_wait_for_displayport(display_timeout_ms)) { : wait_for_hpd(GPIO_USB_C1_HPD, display_timeout_ms); : } : }
Can there be two displays attached at the same time?
We have 1 HDMI and 2 Type-C ports for boxy project. This issue only happens when connected to Type-C dongle on DEV mode and recovery mode. Normal mode boot or DEV mode/recovery mode via HDMI works fine.