Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78319?usp=email )
Change subject: soc/amd/genoa/include/data_fabric: add VGA decode enable register ......................................................................
soc/amd/genoa/include/data_fabric: add VGA decode enable register
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: Iaf4a1fd61ad1d545b1ea0ab3fcf6c7a3d0260cd0 --- M src/soc/amd/genoa/include/soc/data_fabric.h 1 file changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/78319/1
diff --git a/src/soc/amd/genoa/include/soc/data_fabric.h b/src/soc/amd/genoa/include/soc/data_fabric.h index 6388926..02c639a 100644 --- a/src/soc/amd/genoa/include/soc/data_fabric.h +++ b/src/soc/amd/genoa/include/soc/data_fabric.h @@ -6,6 +6,20 @@ #include <amdblocks/data_fabric_defs.h> #include <types.h>
+#define DF_VGA_EN DF_REG_ID(0, 0xc08) + +union df_vga_en { + struct { + uint32_t ve : 1; /* [ 0.. 0] */ + uint32_t np : 1; /* [ 1.. 1] */ + uint32_t cpu_dis : 1; /* [ 2.. 2] */ + uint32_t : 1; /* [ 3.. 3] */ + uint32_t dst_fabric_id : 12; /* [ 4..15] */ + uint32_t : 16; /* [16..31] */ + }; + uint32_t raw; +}; + #define DF_PCI_CFG_BASE0 DF_REG_ID(0, 0xc80) #define DF_PCI_CFG_LIMIT0 DF_REG_ID(0, 0xc84)