Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/55888 )
Change subject: mb/google/brya/variants/primus: Update mainboard properties for BB retimer upgrade ......................................................................
mb/google/brya/variants/primus: Update mainboard properties for BB retimer upgrade
This changes updates mainboard properties by adding DFP number and power_gpio for each DFP.
Reference CB:55348
BUG=b:191897776
Signed-off-by: Casper Chang casper_chang@wistron.corp-partner.google.com Change-Id: I63c912980530e5c9f341bdbab18c07685fd77abf Reviewed-on: https://review.coreboot.org/c/coreboot/+/55888 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Reviewed-by: Nick Vaccaro nvaccaro@google.com --- M src/mainboard/google/brya/variants/primus/overridetree.cb 1 file changed, 16 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Nick Vaccaro: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/mainboard/google/brya/variants/primus/overridetree.cb b/src/mainboard/google/brya/variants/primus/overridetree.cb index 897ff0c..36d015d 100644 --- a/src/mainboard/google/brya/variants/primus/overridetree.cb +++ b/src/mainboard/google/brya/variants/primus/overridetree.cb @@ -156,6 +156,22 @@ .flags = PCIE_RP_LTR | PCIE_RP_AER, }" end #PCIE3 BH799BB + device ref tcss_dma0 on + chip drivers/intel/usb4/retimer + register "dfp" = "{ + [0] = {.power_gpio = ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4), + .group = ACPI_PLD_GROUP(1, 1),}}" + device generic 0 on end + end + end + device ref tcss_dma1 on + chip drivers/intel/usb4/retimer + register "dfp" = "{ + [0] = {.power_gpio = ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4), + .group = ACPI_PLD_GROUP(3, 1)}}" + device generic 0 on end + end + end device ref pcie_rp8 on chip soc/intel/common/block/pcie/rtd3 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"