Change in coreboot[master]: soc/intel/cnl: add SLP_S0 residency register and enable LPIT support - coreboot-gerrit

1 Jan 2021


      Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49046 )
Change subject: soc/intel/cnl: add SLP_S0 residency register and enable LPIT support
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Patch Set 2:
This change is ready for review.
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I51fdf52419aa7f059b70a906fd8bdac88d5b6046
Gerrit-Change-Number: 49046
Gerrit-PatchSet: 2
Gerrit-Owner: Michael Niewöhner foss@mniewoehner.de
Gerrit-Reviewer:  Felix Singer felixsinger@posteo.net
Gerrit-Reviewer: Furquan Shaikh furquan@google.com
Gerrit-Reviewer: Matt DeVillier matt.devillier@gmail.com
Gerrit-Reviewer: Nico Huber nico.h@gmx.de
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net
Gerrit-Reviewer: Shaunak Saha shaunak.saha@intel.corp-partner.google.com
Gerrit-Reviewer: Tim Wawrzynczak twawrzynczak@chromium.org
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-Comment-Date: Fri, 01 Jan 2021 21:19:55 +0000
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