Change in coreboot[master]: soc/intel/common: Include Tigerlake device IDs

[Ravishankar Sarawadi (Code Review)]

Hello Raj Astekar, Patrick Rudolph, Subrata Banik, John Zhao, build bot (Jenkins), Furquan Shaikh,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/36225

to look at the new patch set (#8).

Change subject: soc/intel/common: Include Tigerlake device IDs
......................................................................

soc/intel/common: Include Tigerlake device IDs

Add Tigerlake specific CPU, System Agent, PCH, IGD device IDs.

BUG=None
BRANCH=None
TEST=Build 'emerge-tglrvp coreboot'

Signed-off-by: Ravi Sarawadi 
Change-Id: I19047354718bdf510dffee4659d885f1313a751b
---
M src/include/device/pci_ids.h
M src/soc/intel/common/block/cpu/mp_init.c
M src/soc/intel/common/block/cse/cse.c
M src/soc/intel/common/block/dsp/dsp.c
M src/soc/intel/common/block/graphics/graphics.c
M src/soc/intel/common/block/hda/hda.c
M src/soc/intel/common/block/i2c/i2c.c
M src/soc/intel/common/block/include/intelblocks/gpio_defs.h
M src/soc/intel/common/block/include/intelblocks/mp_init.h
M src/soc/intel/common/block/lpc/lpc.c
M src/soc/intel/common/block/lpc/lpc_def.h
M src/soc/intel/common/block/p2sb/p2sb.c
M src/soc/intel/common/block/pcie/pcie.c
M src/soc/intel/common/block/pmc/pmc.c
M src/soc/intel/common/block/sata/sata.c
M src/soc/intel/common/block/smbus/smbus.c
M src/soc/intel/common/block/spi/spi.c
M src/soc/intel/common/block/sram/sram.c
M src/soc/intel/common/block/systemagent/systemagent.c
M src/soc/intel/common/block/uart/uart.c
M src/soc/intel/common/block/xdci/xdci.c
M src/soc/intel/common/block/xhci/xhci.c
22 files changed, 112 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/36225/8