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I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/61623
to look at the new patch set (#5).
Change subject: soc/intel/alderlake: Define USB2_PORT_MAX_TYPE_C macro ......................................................................
soc/intel/alderlake: Define USB2_PORT_MAX_TYPE_C macro
The patch defines USB2_PORT_MAX_TYPE_C macro to allow mark the type_c flag.The USB2_PORT_MAX_TYPE_C macro modifies the USB2 configuration to indicate the port mapped to Type-C and sets Max TX and Pre-emp settings. This is an extension to existing macro USB2_PORT_MAX.
The change is required to enable port reset event on a USB2 port. This event is passed to USB3 upstream ports to upgrade back to super speed (USB3) after a downgrade during low power state.
BUG=b:193287279 TEST=Build the code for Gimble board
Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com Change-Id: I464f139d8e367907191c04f9170ac53d327776ee --- M src/soc/intel/alderlake/include/soc/usb.h 1 file changed, 11 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/61623/5