Attention is currently required from: Arthur Heymans, Christian Walter, David Hendricks, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Shuo Liu, TangYiwei, Tim Chu.
Hello Arthur Heymans, Christian Walter, David Hendricks, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, TangYiwei, Tim Chu, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/81315?usp=email
to look at the new patch set (#8).
The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins)
Change subject: soc/xeon_sp: Initially add N-1 IBL codes ......................................................................
soc/xeon_sp: Initially add N-1 IBL codes
N-1 IBL (Integrated Boot Logic) codes are initially forked from EBG (Emmitsburg PCH) codes (src/soc/intel/xeon_sp/ebg). N-1 IBL codes are a set of stub codes to fulfill build sanity check for GNR SoC and CRB codes before the formal codes are published.
Change-Id: I5de2d2f4985b4677dbc156fd8b158c0ab0e46342 Signed-off-by: Shuo Liu shuo.liu@intel.com --- A src/soc/intel/xeon_sp/ibl/Makefile.mk A src/soc/intel/xeon_sp/ibl/include/soc/azalia_device.h A src/soc/intel/xeon_sp/ibl/include/soc/gpio_soc_defs.h A src/soc/intel/xeon_sp/ibl/include/soc/pcr_ids.h A src/soc/intel/xeon_sp/ibl/include/soc/pmc.h A src/soc/intel/xeon_sp/ibl/include/soc/soc_pch.h A src/soc/intel/xeon_sp/ibl/include/soc/soc_pm.h A src/soc/intel/xeon_sp/ibl/lockdown.c A src/soc/intel/xeon_sp/ibl/soc_gpio.c A src/soc/intel/xeon_sp/ibl/soc_pch.c A src/soc/intel/xeon_sp/ibl/soc_pmutil.c M src/soc/intel/xeon_sp/include/soc/pch_pci_devs.h 12 files changed, 903 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/81315/8