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Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Martin L Roth, Matt DeVillier, Martin Roth, Fred Reitberger, Karthik Ramasubramanian, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/71562
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Change subject: soc/amd/mendocino: Hook up UPD dxio_tx_vboost_enable for PCIe optimization
......................................................................
soc/amd/mendocino: Hook up UPD dxio_tx_vboost_enable for PCIe optimization
Add the UPD dxio_tx_vboost_enable for PCIe optimization.
It will impact the PCIe signal integrity, need to double-confirm
the SI result after enabling this setting.
BUG=b:259622787
BRANCH=none
TEST=confirm the setting has been set correspondingly with checking
the FSP log.
Signed-off-by: Chris.Wang chris.wang@amd.corp-partner.google.com
Change-Id: I05ae5b3091219e0cb1fe469c929fad6a725db678
---
M src/soc/amd/mendocino/chip.h
M src/soc/amd/mendocino/fsp_m_params.c
M src/vendorcode/amd/fsp/mendocino/FspmUpd.h
3 files changed, 26 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/71562/3
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