Change in ...coreboot[master]: soc/intel/cannonlake: Configure serial debug uart

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31375 )

Change subject: soc/intel/cannonlake: Configure serial debug uart
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Patch Set 2:

(3 comments)

https://review.coreboot.org/#/c/31375/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/#/c/31375/2//COMMIT_MSG@10 
PS2, Line 10: SerialIoDebugUartNumber UPD use to select UART Number for Debug Purpose
Can you please add details indicating that this UPD defaults to 2 if not set and hence it needs to be initialized as per this config.

https://review.coreboot.org/#/c/31375/2/src/soc/intel/cannonlake/fsp_params.... 
File src/soc/intel/cannonlake/fsp_params.c:

https://review.coreboot.org/#/c/31375/2/src/soc/intel/cannonlake/fsp_params.... 
PS2, Line 166: *
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https://review.coreboot.org/#/c/31375/2/src/soc/intel/cannonlake/fsp_params.... 
PS2, Line 166: *
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