Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34973 )
Change subject: emulation/qemu-x86: Use common romstage code ......................................................................
emulation/qemu-x86: Use common romstage code
This provides stack guards with checking and common entry into postcar.
Change-Id: If0729721f0165187946107eb98e8bc754f28e517 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/cpu/qemu-x86/Makefile.inc M src/mainboard/emulation/qemu-i440fx/memory.c M src/mainboard/emulation/qemu-i440fx/romstage.c M src/mainboard/emulation/qemu-q35/romstage.c 4 files changed, 12 insertions(+), 42 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/34973/1
diff --git a/src/cpu/qemu-x86/Makefile.inc b/src/cpu/qemu-x86/Makefile.inc index 8ddaa81..6278f1b 100644 --- a/src/cpu/qemu-x86/Makefile.inc +++ b/src/cpu/qemu-x86/Makefile.inc @@ -14,7 +14,11 @@
bootblock-y += cache_as_ram_bootblock.S bootblock-y += bootblock.c + +romstage-y += ../intel/car/romstage.c + ramstage-y += qemu.c + subdirs-y += ../x86/mtrr subdirs-y += ../x86/lapic subdirs-y += ../x86/smm diff --git a/src/mainboard/emulation/qemu-i440fx/memory.c b/src/mainboard/emulation/qemu-i440fx/memory.c index aa1ceba..8209379 100644 --- a/src/mainboard/emulation/qemu-i440fx/memory.c +++ b/src/mainboard/emulation/qemu-i440fx/memory.c @@ -15,6 +15,7 @@
#include <cbmem.h> #include <arch/io.h> +#include <arch/romstage.h> #include "memory.h" #include "fw_cfg.h"
@@ -61,3 +62,8 @@
return (void *)top; } + +/* Nothing to do, MTRRs are no-op on QEMU. */ +void fill_postcar_frame(struct postcar_frame *pcf) +{ +} diff --git a/src/mainboard/emulation/qemu-i440fx/romstage.c b/src/mainboard/emulation/qemu-i440fx/romstage.c index 32eab3d..8e5691f 100644 --- a/src/mainboard/emulation/qemu-i440fx/romstage.c +++ b/src/mainboard/emulation/qemu-i440fx/romstage.c @@ -14,31 +14,10 @@ * GNU General Public License for more details. */
-#include <arch/cpu.h> #include <arch/romstage.h> -#include <stdint.h> #include <cbmem.h> -#include <console/console.h> -#include <timestamp.h> -#include <program_loading.h>
-asmlinkage void car_stage_entry(void) +void mainboard_romstage_entry(void) { - struct postcar_frame pcf; - - console_init(); - cbmem_recovery(0); - - timestamp_add_now(TS_START_ROMSTAGE); - - if (postcar_frame_init(&pcf, 0)) - die("Unable to initialize postcar frame.\n"); - - /** - * Run postcar to tear down CAR and load relocatable ramstage. - * There's no CAR on qemu, but for educational purposes and - * testing the postcar stage is used on qemu, too. - */ - run_postcar_phase(&pcf); } diff --git a/src/mainboard/emulation/qemu-q35/romstage.c b/src/mainboard/emulation/qemu-q35/romstage.c index 6cd9ee4..b7fdac2 100644 --- a/src/mainboard/emulation/qemu-q35/romstage.c +++ b/src/mainboard/emulation/qemu-q35/romstage.c @@ -14,14 +14,10 @@ * GNU General Public License for more details. */
-#include <arch/cpu.h> #include <arch/romstage.h> -#include <stdint.h> #include <cbmem.h> #include <console/console.h> -#include <timestamp.h> #include <southbridge/intel/i82801ix/i82801ix.h> -#include <program_loading.h> #include <device/pci_ops.h>
#define D0F0_PCIEXBAR_LO 0x60 @@ -35,26 +31,11 @@ die("You must run qemu for machine Q35 (-M q35)"); }
-asmlinkage void car_stage_entry(void) +void mainboard_romstage_entry(void) { - struct postcar_frame pcf; i82801ix_early_init(); - console_init();
mainboard_machine_check();
cbmem_recovery(0); - - timestamp_add_now(TS_START_ROMSTAGE); - - if (postcar_frame_init(&pcf, 0)) - die("Unable to initialize postcar frame.\n"); - - /** - * Run postcar to tear down CAR and load relocatable ramstage. - * There's no CAR on qemu, but for educational purposes and - * testing the postcar stage is used on qemu, too. - */ - - run_postcar_phase(&pcf); }
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34973 )
Change subject: emulation/qemu-x86: Use common romstage code ......................................................................
Patch Set 6: Code-Review+2
Kyösti Mälkki has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/34973 )
Change subject: emulation/qemu-x86: Use common romstage code ......................................................................
emulation/qemu-x86: Use common romstage code
This provides stack guards with checking and common entry into postcar.
Change-Id: If0729721f0165187946107eb98e8bc754f28e517 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/34973 Reviewed-by: Patrick Rudolph siro@das-labor.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/cpu/qemu-x86/Makefile.inc M src/mainboard/emulation/qemu-i440fx/memory.c M src/mainboard/emulation/qemu-i440fx/romstage.c M src/mainboard/emulation/qemu-q35/romstage.c 4 files changed, 12 insertions(+), 42 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Rudolph: Looks good to me, approved
diff --git a/src/cpu/qemu-x86/Makefile.inc b/src/cpu/qemu-x86/Makefile.inc index 8ddaa81..6278f1b 100644 --- a/src/cpu/qemu-x86/Makefile.inc +++ b/src/cpu/qemu-x86/Makefile.inc @@ -14,7 +14,11 @@
bootblock-y += cache_as_ram_bootblock.S bootblock-y += bootblock.c + +romstage-y += ../intel/car/romstage.c + ramstage-y += qemu.c + subdirs-y += ../x86/mtrr subdirs-y += ../x86/lapic subdirs-y += ../x86/smm diff --git a/src/mainboard/emulation/qemu-i440fx/memory.c b/src/mainboard/emulation/qemu-i440fx/memory.c index aa1ceba..8209379 100644 --- a/src/mainboard/emulation/qemu-i440fx/memory.c +++ b/src/mainboard/emulation/qemu-i440fx/memory.c @@ -15,6 +15,7 @@
#include <cbmem.h> #include <arch/io.h> +#include <arch/romstage.h> #include "memory.h" #include "fw_cfg.h"
@@ -61,3 +62,8 @@
return (void *)top; } + +/* Nothing to do, MTRRs are no-op on QEMU. */ +void fill_postcar_frame(struct postcar_frame *pcf) +{ +} diff --git a/src/mainboard/emulation/qemu-i440fx/romstage.c b/src/mainboard/emulation/qemu-i440fx/romstage.c index 32eab3d..8e5691f 100644 --- a/src/mainboard/emulation/qemu-i440fx/romstage.c +++ b/src/mainboard/emulation/qemu-i440fx/romstage.c @@ -14,31 +14,10 @@ * GNU General Public License for more details. */
-#include <arch/cpu.h> #include <arch/romstage.h> -#include <stdint.h> #include <cbmem.h> -#include <console/console.h> -#include <timestamp.h> -#include <program_loading.h>
-asmlinkage void car_stage_entry(void) +void mainboard_romstage_entry(void) { - struct postcar_frame pcf; - - console_init(); - cbmem_recovery(0); - - timestamp_add_now(TS_START_ROMSTAGE); - - if (postcar_frame_init(&pcf, 0)) - die("Unable to initialize postcar frame.\n"); - - /** - * Run postcar to tear down CAR and load relocatable ramstage. - * There's no CAR on qemu, but for educational purposes and - * testing the postcar stage is used on qemu, too. - */ - run_postcar_phase(&pcf); } diff --git a/src/mainboard/emulation/qemu-q35/romstage.c b/src/mainboard/emulation/qemu-q35/romstage.c index 6cd9ee4..b7fdac2 100644 --- a/src/mainboard/emulation/qemu-q35/romstage.c +++ b/src/mainboard/emulation/qemu-q35/romstage.c @@ -14,14 +14,10 @@ * GNU General Public License for more details. */
-#include <arch/cpu.h> #include <arch/romstage.h> -#include <stdint.h> #include <cbmem.h> #include <console/console.h> -#include <timestamp.h> #include <southbridge/intel/i82801ix/i82801ix.h> -#include <program_loading.h> #include <device/pci_ops.h>
#define D0F0_PCIEXBAR_LO 0x60 @@ -35,26 +31,11 @@ die("You must run qemu for machine Q35 (-M q35)"); }
-asmlinkage void car_stage_entry(void) +void mainboard_romstage_entry(void) { - struct postcar_frame pcf; i82801ix_early_init(); - console_init();
mainboard_machine_check();
cbmem_recovery(0); - - timestamp_add_now(TS_START_ROMSTAGE); - - if (postcar_frame_init(&pcf, 0)) - die("Unable to initialize postcar frame.\n"); - - /** - * Run postcar to tear down CAR and load relocatable ramstage. - * There's no CAR on qemu, but for educational purposes and - * testing the postcar stage is used on qemu, too. - */ - - run_postcar_phase(&pcf); }
-
Kyösti Mälkki (Code Review) -
Patrick Rudolph (Code Review)