Change in coreboot[master]: soc/intel/common/cse: Add function to perform CSE lock configuration

[Subrata Banik (Code Review)]

Attention is currently required from: Sridhar Siricilla, Werner Zeh, Patrick Rudolph.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61520 )

Change subject: soc/intel/common/cse: Add function to perform CSE lock configuration
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Patch Set 6:

(1 comment)

File src/soc/intel/common/block/cse/cse.c:

https://review.coreboot.org/c/coreboot/+/61520/comment/f3add991_d897103a 
PS5, Line 1014: 	/*
> > Please update the ME BWG to document the expectation for applicable CSE LITE SKU.
> Please raise a bug for FSP, as today in ADL FSP does below highlighted programming as well unconditionally (please investigate inside FSP Notify API code) without any flag about LITE or consumer, wondering how so far on TGL, JSL and ADL CSE FW update works with below implementation inside FSP. Do you want me to raise those 2 bugs ?
>
> This is only applicable in the manufacturing environment. I can get this fixed in the FSP for ADL-N and later projects.

I'm not very sure about enabling skip FSP-notify CL for ADL-P hence, to me it also important to have this fixed in ADL-P FSP as well. For later we can use coreboot native driver.
> Please note the production systems don't affect with global reset lock as those systems always prevent global reset in the OS environment.

Sorry, I didn't get your point. Who prevents global reset in OS environment ? Can you please share pointers?