Vladimir Serbinenko (phcoder@gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13532
-gerrit
commit ea2973fd1e058db99a5bf76df6171f7c26e5b913 Author: Vladimir Serbinenko phcoder@gmail.com Date: Sun Jan 31 13:21:04 2016 +0100
stout: Add native gfx init
Tested during FOSDEM.
Change-Id: Id095364d6e4735256e54a68ea9ae677355dd386a Signed-off-by: Vladimir Serbinenko phcoder@gmail.com --- src/mainboard/google/stout/Kconfig | 5 +++++ src/mainboard/google/stout/devicetree.cb | 4 ++++ 2 files changed, 9 insertions(+)
diff --git a/src/mainboard/google/stout/Kconfig b/src/mainboard/google/stout/Kconfig index 666c1ae..aee0da4 100644 --- a/src/mainboard/google/stout/Kconfig +++ b/src/mainboard/google/stout/Kconfig @@ -15,6 +15,11 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_LPC_TPM select INTEL_INT15 + select VGA + select INTEL_EDID + select MAINBOARD_HAS_NATIVE_VGA_INIT + select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG + select IVYBRIDGE_LVDS
config CHROMEOS select CHROMEOS_VBNV_CMOS diff --git a/src/mainboard/google/stout/devicetree.cb b/src/mainboard/google/stout/devicetree.cb index 1992664..8c579d6 100644 --- a/src/mainboard/google/stout/devicetree.cb +++ b/src/mainboard/google/stout/devicetree.cb @@ -13,6 +13,10 @@ chip northbridge/intel/sandybridge register "gpu_panel_power_down_delay" = "150" # T3: 15ms register "gpu_panel_power_backlight_on_delay" = "2100" # T5: 210ms register "gpu_panel_power_backlight_off_delay" = "2100" # TD: 210ms + register "gfx.use_spread_spectrum_clock" = "0" + register "gfx.link_frequency_270_mhz" = "1" + register "gpu_cpu_backlight" = "0x1155" + register "gpu_pch_backlight" = "0x06100610"
device cpu_cluster 0 on chip cpu/intel/socket_rPGA989