Furquan Shaikh (furquan@google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14428
-gerrit
commit df8473d4a5bd79bd3b8b36a9fb87df213f525b26 Author: Furquan Shaikh furquan@google.com Date: Tue Apr 19 15:49:23 2016 -0700
soc/intel/apollolake: Set default memory type to uncacheable
Set the default memory type in MTRRCap register to 0. This ensures that even if the MTRR Enable bit is set in MTRRCap register, the default memory type is still uncacheable.
Change-Id: I63e7993f8b65dabbab60e7c1bb8d6d89ef4da9ee Signed-off-by: Furquan Shaikh furquan@google.com --- src/soc/intel/apollolake/bootblock/cache_as_ram.S | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/soc/intel/apollolake/bootblock/cache_as_ram.S b/src/soc/intel/apollolake/bootblock/cache_as_ram.S index 9d2bba0..cd301ac 100644 --- a/src/soc/intel/apollolake/bootblock/cache_as_ram.S +++ b/src/soc/intel/apollolake/bootblock/cache_as_ram.S @@ -63,7 +63,9 @@ clear_var_mtrr: /* Configure default memory type to uncacheable (UC) */ mov $MTRR_DEF_TYPE_MSR, %ecx rdmsr - and $MTRR_DEF_TYPE_MASK, %eax + /* Clear enable bits and set default type to UC. */ + and $~(MTRR_DEF_TYPE_MASK | MTRR_DEF_TYPE_EN | \ + MTRR_DEF_TYPE_FIX_EN), %eax wrmsr
post_code(0x24)