Change in coreboot[master]: soc/amd/stoneyridge: use new ACPI helper functions from common
Aaron Durbin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44483 )
Change subject: soc/amd/stoneyridge: use new ACPI helper functions from common ......................................................................
soc/amd/stoneyridge: use new ACPI helper functions from common
Transition the current call sequence to using the newly added common ACPI helper functions. Semantically, the expectations are that this sequence is the equivalent of previous acpi_clear_pm1_status().
BUG=b:159947207
Signed-off-by: Aaron Durbin adurbin@chromium.org Change-Id: Id3ae19013c68d2c97b084046f600596ecc462374 --- M src/soc/amd/stoneyridge/southbridge.c 1 file changed, 14 insertions(+), 37 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/44483/1
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index 628aea9..c801036 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -501,59 +501,36 @@ PM_ACPI_TIMER_EN_EN); }
-static int get_index_bit(uint32_t value, uint16_t limit) -{ - uint16_t i; - uint32_t t; - - if (limit >= TOTAL_BITS(uint32_t)) - return -1; - - /* get a mask of valid bits. Ex limit = 3, set bits 0-2 */ - t = (1 << limit) - 1; - if ((value & t) == 0) - return -1; - t = 1; - for (i = 0; i < limit; i++) { - if (value & t) - break; - t <<= 1; - } - return i; -} - static void set_nvs_sws(void *unused) { - struct soc_power_reg *sws; + struct acpi_pm_gpe_state *state; struct global_nvs *gnvs; - int index;
- sws = cbmem_find(CBMEM_ID_POWER_STATE); - if (sws == NULL) + state = cbmem_find(CBMEM_ID_POWER_STATE); + if (state == NULL) return; gnvs = acpi_get_gnvs(); if (gnvs == NULL) return;
- index = get_index_bit(sws->pm1_sts & sws->pm1_en, PM1_LIMIT); - if (index < 0) - gnvs->pm1i = ~0ULL; - else - gnvs->pm1i = index; - - index = get_index_bit(sws->gpe0_sts & sws->gpe0_en, GPE0_LIMIT); - if (index < 0) - gnvs->gpei = ~0ULL; - else - gnvs->gpei = index; + acpi_fill_gnvs(gnvs, state); }
BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, set_nvs_sws, NULL);
void southbridge_init(void *chip_info) { + struct acpi_pm_gpe_state *state; + sb_init_acpi_ports(); - acpi_clear_pm1_status(); + + state = cbmem_add(CBMEM_ID_POWER_STATE, sizeof(*state)); + if (state) { + acpi_fill_pm_gpe_state(state); + acpi_pm_gpe_add_events_print_events(); + } + + acpi_clear_pm_gpe_status(); }
static void set_sb_final_nvs(void)
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44483 )
Change subject: soc/amd/stoneyridge: use new ACPI helper functions from common ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44483/1/src/soc/amd/stoneyridge/sou... File src/soc/amd/stoneyridge/southbridge.c:
https://review.coreboot.org/c/coreboot/+/44483/1/src/soc/amd/stoneyridge/sou... PS1, Line 530: acpi_pm_gpe_add_events_print_events(); src/soc/amd/stoneyridge/southbridge.c:530:3: error: too few arguments to function 'acpi_pm_gpe_add_events_print_events' acpi_pm_gpe_add_events_print_events();
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44483 )
Change subject: soc/amd/stoneyridge: use new ACPI helper functions from common ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44483/1/src/soc/amd/stoneyridge/sou... File src/soc/amd/stoneyridge/southbridge.c:
https://review.coreboot.org/c/coreboot/+/44483/1/src/soc/amd/stoneyridge/sou... PS1, Line 530: acpi_pm_gpe_add_events_print_events();
src/soc/amd/stoneyridge/southbridge. […]
Done
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44483
to look at the new patch set (#2).
Change subject: soc/amd/stoneyridge: use new ACPI helper functions from common ......................................................................
soc/amd/stoneyridge: use new ACPI helper functions from common
Transition the current call sequence to using the newly added common ACPI helper functions. Semantically, the expectations are that this sequence is the equivalent of previous acpi_clear_pm1_status().
BUG=b:159947207
Signed-off-by: Aaron Durbin adurbin@chromium.org Change-Id: Id3ae19013c68d2c97b084046f600596ecc462374 --- M src/soc/amd/stoneyridge/southbridge.c 1 file changed, 14 insertions(+), 37 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/44483/2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44483 )
Change subject: soc/amd/stoneyridge: use new ACPI helper functions from common ......................................................................
Patch Set 2: Code-Review+2
Aaron Durbin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44483 )
Change subject: soc/amd/stoneyridge: use new ACPI helper functions from common ......................................................................
soc/amd/stoneyridge: use new ACPI helper functions from common
Transition the current call sequence to using the newly added common ACPI helper functions. Semantically, the expectations are that this sequence is the equivalent of previous acpi_clear_pm1_status().
BUG=b:159947207
Signed-off-by: Aaron Durbin adurbin@chromium.org Change-Id: Id3ae19013c68d2c97b084046f600596ecc462374 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44483 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com --- M src/soc/amd/stoneyridge/southbridge.c 1 file changed, 14 insertions(+), 37 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index 628aea9..267f747 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -501,59 +501,36 @@ PM_ACPI_TIMER_EN_EN); }
-static int get_index_bit(uint32_t value, uint16_t limit) -{ - uint16_t i; - uint32_t t; - - if (limit >= TOTAL_BITS(uint32_t)) - return -1; - - /* get a mask of valid bits. Ex limit = 3, set bits 0-2 */ - t = (1 << limit) - 1; - if ((value & t) == 0) - return -1; - t = 1; - for (i = 0; i < limit; i++) { - if (value & t) - break; - t <<= 1; - } - return i; -} - static void set_nvs_sws(void *unused) { - struct soc_power_reg *sws; + struct acpi_pm_gpe_state *state; struct global_nvs *gnvs; - int index;
- sws = cbmem_find(CBMEM_ID_POWER_STATE); - if (sws == NULL) + state = cbmem_find(CBMEM_ID_POWER_STATE); + if (state == NULL) return; gnvs = acpi_get_gnvs(); if (gnvs == NULL) return;
- index = get_index_bit(sws->pm1_sts & sws->pm1_en, PM1_LIMIT); - if (index < 0) - gnvs->pm1i = ~0ULL; - else - gnvs->pm1i = index; - - index = get_index_bit(sws->gpe0_sts & sws->gpe0_en, GPE0_LIMIT); - if (index < 0) - gnvs->gpei = ~0ULL; - else - gnvs->gpei = index; + acpi_fill_gnvs(gnvs, state); }
BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, set_nvs_sws, NULL);
void southbridge_init(void *chip_info) { + struct acpi_pm_gpe_state *state; + sb_init_acpi_ports(); - acpi_clear_pm1_status(); + + state = cbmem_add(CBMEM_ID_POWER_STATE, sizeof(*state)); + if (state) { + acpi_fill_pm_gpe_state(state); + acpi_pm_gpe_add_events_print_events(state); + } + + acpi_clear_pm_gpe_status(); }
static void set_sb_final_nvs(void)
-
Aaron Durbin (Code Review) -
Furquan Shaikh (Code Review)