Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36775 )
Change subject: mb/*/*{i440BX}: Enable console in bootblock ......................................................................
mb/*/*{i440BX}: Enable console in bootblock
This renames and links romstage.c into both the bootblock and the romstage. The definition of spd_read_byte needs to be guarded in bootblock as the declaration is only done in bootblock.
Change-Id: I87e5eb93c15a72f790739eff8395e7eecbf1eb04 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- A src/mainboard/asus/p2b-d/Makefile.inc R src/mainboard/asus/p2b-d/early_init.c A src/mainboard/asus/p2b-ds/Makefile.inc R src/mainboard/asus/p2b-ds/early_init.c A src/mainboard/asus/p2b-f/Makefile.inc R src/mainboard/asus/p2b-f/early_init.c A src/mainboard/asus/p2b-ls/Makefile.inc R src/mainboard/asus/p2b-ls/early_init.c A src/mainboard/asus/p2b/Makefile.inc R src/mainboard/asus/p2b/early_init.c A src/mainboard/asus/p3b-f/Makefile.inc R src/mainboard/asus/p3b-f/early_init.c M src/northbridge/intel/i440bx/Kconfig M src/southbridge/intel/i82371eb/i82371eb.h 14 files changed, 46 insertions(+), 22 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/36775/1
diff --git a/src/mainboard/asus/p2b-d/Makefile.inc b/src/mainboard/asus/p2b-d/Makefile.inc new file mode 100644 index 0000000..0a9a8c0 --- /dev/null +++ b/src/mainboard/asus/p2b-d/Makefile.inc @@ -0,0 +1,2 @@ +bootblock-y += early_init.c +romstage-y += early_init.c \ No newline at end of file diff --git a/src/mainboard/asus/p2b-d/romstage.c b/src/mainboard/asus/p2b-d/early_init.c similarity index 94% rename from src/mainboard/asus/p2b-d/romstage.c rename to src/mainboard/asus/p2b-d/early_init.c index 7fad06b..172ee95 100644 --- a/src/mainboard/asus/p2b-d/romstage.c +++ b/src/mainboard/asus/p2b-d/early_init.c @@ -15,4 +15,4 @@ */
/* Shares romstage with P2B-DS */ -#include "../p2b-ds/romstage.c" +#include "../p2b-ds/early_init.c" diff --git a/src/mainboard/asus/p2b-ds/Makefile.inc b/src/mainboard/asus/p2b-ds/Makefile.inc new file mode 100644 index 0000000..0a9a8c0 --- /dev/null +++ b/src/mainboard/asus/p2b-ds/Makefile.inc @@ -0,0 +1,2 @@ +bootblock-y += early_init.c +romstage-y += early_init.c \ No newline at end of file diff --git a/src/mainboard/asus/p2b-ds/romstage.c b/src/mainboard/asus/p2b-ds/early_init.c similarity index 91% rename from src/mainboard/asus/p2b-ds/romstage.c rename to src/mainboard/asus/p2b-ds/early_init.c index 5b3a30b..248cb21 100644 --- a/src/mainboard/asus/p2b-ds/romstage.c +++ b/src/mainboard/asus/p2b-ds/early_init.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */
-#include <device/pci_def.h> +#include <bootblock_common.h> #include <console/console.h> #include <southbridge/intel/i82371eb/i82371eb.h> #include <northbridge/intel/i440bx/raminit.h> @@ -25,16 +25,20 @@
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
+void bootblock_mainboard_early_init(void) +{ + winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); +} + +#if ENV_ROMSTAGE int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); } +#endif
void mainboard_romstage_entry(void) { - winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - enable_smbus(); sdram_initialize(); cbmem_initialize_empty(); diff --git a/src/mainboard/asus/p2b-f/Makefile.inc b/src/mainboard/asus/p2b-f/Makefile.inc new file mode 100644 index 0000000..0a9a8c0 --- /dev/null +++ b/src/mainboard/asus/p2b-f/Makefile.inc @@ -0,0 +1,2 @@ +bootblock-y += early_init.c +romstage-y += early_init.c \ No newline at end of file diff --git a/src/mainboard/asus/p2b-f/romstage.c b/src/mainboard/asus/p2b-f/early_init.c similarity index 94% rename from src/mainboard/asus/p2b-f/romstage.c rename to src/mainboard/asus/p2b-f/early_init.c index 31a100c..b61a318 100644 --- a/src/mainboard/asus/p2b-f/romstage.c +++ b/src/mainboard/asus/p2b-f/early_init.c @@ -15,4 +15,4 @@ */
/* Shares romstage with the better supported P2B-LS sibling. */ -#include "../p2b-ls/romstage.c" +#include "../p2b-ls/early_init.c" diff --git a/src/mainboard/asus/p2b-ls/Makefile.inc b/src/mainboard/asus/p2b-ls/Makefile.inc new file mode 100644 index 0000000..0a9a8c0 --- /dev/null +++ b/src/mainboard/asus/p2b-ls/Makefile.inc @@ -0,0 +1,2 @@ +bootblock-y += early_init.c +romstage-y += early_init.c \ No newline at end of file diff --git a/src/mainboard/asus/p2b-ls/romstage.c b/src/mainboard/asus/p2b-ls/early_init.c similarity index 92% rename from src/mainboard/asus/p2b-ls/romstage.c rename to src/mainboard/asus/p2b-ls/early_init.c index f933c77..ef7d3d8 100644 --- a/src/mainboard/asus/p2b-ls/romstage.c +++ b/src/mainboard/asus/p2b-ls/early_init.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */
-#include <device/pci_def.h> +#include <bootblock_common.h> #include <console/console.h> #include <southbridge/intel/i82371eb/i82371eb.h> #include <northbridge/intel/i440bx/raminit.h> @@ -26,6 +26,12 @@
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
+void bootblock_mainboard_early_init(void) +{ + winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); +} + +#if ENV_ROMSTAGE int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); @@ -33,10 +39,8 @@
void mainboard_romstage_entry(void) { - winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - enable_smbus(); sdram_initialize(); cbmem_initialize_empty(); } +#endif diff --git a/src/mainboard/asus/p2b/Makefile.inc b/src/mainboard/asus/p2b/Makefile.inc new file mode 100644 index 0000000..0a9a8c0 --- /dev/null +++ b/src/mainboard/asus/p2b/Makefile.inc @@ -0,0 +1,2 @@ +bootblock-y += early_init.c +romstage-y += early_init.c \ No newline at end of file diff --git a/src/mainboard/asus/p2b/romstage.c b/src/mainboard/asus/p2b/early_init.c similarity index 91% rename from src/mainboard/asus/p2b/romstage.c rename to src/mainboard/asus/p2b/early_init.c index 1d7c928..69450de 100644 --- a/src/mainboard/asus/p2b/romstage.c +++ b/src/mainboard/asus/p2b/early_init.c @@ -14,8 +14,7 @@ * GNU General Public License for more details. */
-#include <device/pci_def.h> -#include <console/console.h> +#include <bootblock_common.h> #include <southbridge/intel/i82371eb/i82371eb.h> #include <northbridge/intel/i440bx/raminit.h> #include <arch/romstage.h> @@ -25,16 +24,20 @@
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
+void bootblock_mainboard_early_init(void) +{ + winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); +} + +#if ENV_ROMSTAGE int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); } +#endif
void mainboard_romstage_entry(void) { - winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - enable_smbus(); sdram_initialize(); cbmem_initialize_empty(); diff --git a/src/mainboard/asus/p3b-f/Makefile.inc b/src/mainboard/asus/p3b-f/Makefile.inc new file mode 100644 index 0000000..0a9a8c0 --- /dev/null +++ b/src/mainboard/asus/p3b-f/Makefile.inc @@ -0,0 +1,2 @@ +bootblock-y += early_init.c +romstage-y += early_init.c \ No newline at end of file diff --git a/src/mainboard/asus/p3b-f/romstage.c b/src/mainboard/asus/p3b-f/early_init.c similarity index 95% rename from src/mainboard/asus/p3b-f/romstage.c rename to src/mainboard/asus/p3b-f/early_init.c index 8fc135d..8524098 100644 --- a/src/mainboard/asus/p3b-f/romstage.c +++ b/src/mainboard/asus/p3b-f/early_init.c @@ -14,8 +14,8 @@ * GNU General Public License for more details. */
+#include <bootblock_common.h> #include <arch/io.h> -#include <device/pci_def.h> #include <console/console.h> #include <southbridge/intel/i82371eb/i82371eb.h> #include <northbridge/intel/i440bx/raminit.h> @@ -28,10 +28,17 @@ /* FIXME: The ASUS P3B-F has a Winbond W83977EF, actually. */ #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
+void bootblock_mainboard_early_init(void) +{ + winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); +} + +#if ENV_ROMSTAGE int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); } +#endif
/* * ASUS P3B-F specific SPD enable magic. @@ -66,9 +73,6 @@
void mainboard_romstage_entry(void) { - winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - enable_smbus(); enable_pm();
diff --git a/src/northbridge/intel/i440bx/Kconfig b/src/northbridge/intel/i440bx/Kconfig index 01154da..45cdd9c 100644 --- a/src/northbridge/intel/i440bx/Kconfig +++ b/src/northbridge/intel/i440bx/Kconfig @@ -18,7 +18,6 @@ select NO_MMCONF_SUPPORT select HAVE_DEBUG_RAM_SETUP select UDELAY_IO - select NO_BOOTBLOCK_CONSOLE
config SDRAMPWR_4DIMM bool diff --git a/src/southbridge/intel/i82371eb/i82371eb.h b/src/southbridge/intel/i82371eb/i82371eb.h index 77931cb..d35b215 100644 --- a/src/southbridge/intel/i82371eb/i82371eb.h +++ b/src/southbridge/intel/i82371eb/i82371eb.h @@ -19,10 +19,8 @@
#if !defined(__ACPI__)
-#ifndef __ROMCC__ #include <device/device.h> void i82371eb_enable(struct device *dev); -#endif
void i82371eb_hard_reset(void);
Hello Kyösti Mälkki, Keith Hui, Patrick Rudolph, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36775
to look at the new patch set (#2).
Change subject: mb/*/*{i440BX}: Enable console in bootblock ......................................................................
mb/*/*{i440BX}: Enable console in bootblock
This renames and links romstage.c into both the bootblock and the romstage. The definition of spd_read_byte needs to be guarded in bootblock as the declaration is only done in bootblock.
Change-Id: I87e5eb93c15a72f790739eff8395e7eecbf1eb04 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- A src/mainboard/asus/p2b-d/Makefile.inc R src/mainboard/asus/p2b-d/early_init.c A src/mainboard/asus/p2b-ds/Makefile.inc R src/mainboard/asus/p2b-ds/early_init.c A src/mainboard/asus/p2b-f/Makefile.inc R src/mainboard/asus/p2b-f/early_init.c A src/mainboard/asus/p2b-ls/Makefile.inc R src/mainboard/asus/p2b-ls/early_init.c A src/mainboard/asus/p2b/Makefile.inc R src/mainboard/asus/p2b/early_init.c A src/mainboard/asus/p3b-f/Makefile.inc R src/mainboard/asus/p3b-f/early_init.c M src/northbridge/intel/i440bx/Kconfig M src/southbridge/intel/i82371eb/i82371eb.h 14 files changed, 46 insertions(+), 22 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/36775/2
Branden Waldner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36775 )
Change subject: mb/*/*{i440BX}: Enable console in bootblock ......................................................................
Patch Set 3:
I successfully boot tested it on my asus/p2b
Hello Kyösti Mälkki, Keith Hui, Patrick Rudolph, build bot (Jenkins), Branden Waldner, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36775
to look at the new patch set (#4).
Change subject: mb/*/*{i440BX}: Enable console in bootblock ......................................................................
mb/*/*{i440BX}: Enable console in bootblock
This renames and links romstage.c into both the bootblock and the romstage. The definition of spd_read_byte needs to be guarded in bootblock as the declaration is only done in bootblock.
Change-Id: I87e5eb93c15a72f790739eff8395e7eecbf1eb04 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- A src/mainboard/asus/p2b-d/Makefile.inc R src/mainboard/asus/p2b-d/early_init.c A src/mainboard/asus/p2b-ds/Makefile.inc R src/mainboard/asus/p2b-ds/early_init.c A src/mainboard/asus/p2b-f/Makefile.inc R src/mainboard/asus/p2b-f/early_init.c A src/mainboard/asus/p2b-ls/Makefile.inc R src/mainboard/asus/p2b-ls/early_init.c A src/mainboard/asus/p2b/Makefile.inc R src/mainboard/asus/p2b/early_init.c A src/mainboard/asus/p3b-f/Makefile.inc R src/mainboard/asus/p3b-f/early_init.c M src/northbridge/intel/i440bx/Kconfig M src/southbridge/intel/i82371eb/i82371eb.h 14 files changed, 46 insertions(+), 22 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/36775/4
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36775 )
Change subject: mb/*/*{i440BX}: Enable console in bootblock ......................................................................
Patch Set 4:
Patch Set 3:
I successfully boot tested it on my asus/p2b
Thx for testing.
Hello Kyösti Mälkki, Keith Hui, Patrick Rudolph, build bot (Jenkins), Branden Waldner, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36775
to look at the new patch set (#5).
Change subject: mb/*/*{i440BX}: Enable console in bootblock ......................................................................
mb/*/*{i440BX}: Enable console in bootblock
This renames and links romstage.c into both the bootblock and the romstage. The definition of spd_read_byte needs to be guarded in bootblock as the declaration is only done in bootblock.
The bootblock size grows beyond 8K so the size needs to be increased to 16K.
Change-Id: I87e5eb93c15a72f790739eff8395e7eecbf1eb04 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/cpu/intel/slot_1/Kconfig A src/mainboard/asus/p2b-d/Makefile.inc R src/mainboard/asus/p2b-d/early_init.c A src/mainboard/asus/p2b-ds/Makefile.inc R src/mainboard/asus/p2b-ds/early_init.c A src/mainboard/asus/p2b-f/Makefile.inc R src/mainboard/asus/p2b-f/early_init.c A src/mainboard/asus/p2b-ls/Makefile.inc R src/mainboard/asus/p2b-ls/early_init.c A src/mainboard/asus/p2b/Makefile.inc R src/mainboard/asus/p2b/early_init.c A src/mainboard/asus/p3b-f/Makefile.inc R src/mainboard/asus/p3b-f/early_init.c M src/northbridge/intel/i440bx/Kconfig M src/southbridge/intel/i82371eb/i82371eb.h 15 files changed, 47 insertions(+), 23 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/36775/5
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36775 )
Change subject: mb/*/*{i440BX}: Enable console in bootblock ......................................................................
Patch Set 5: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/36775/5/src/mainboard/asus/p2b-ls/e... File src/mainboard/asus/p2b-ls/early_init.c:
https://review.coreboot.org/c/coreboot/+/36775/5/src/mainboard/asus/p2b-ls/e... PS5, Line 46: #endif Other file only guards spd_read_byte().
Hello Kyösti Mälkki, Keith Hui, Patrick Rudolph, build bot (Jenkins), Branden Waldner, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36775
to look at the new patch set (#6).
Change subject: mb/*/*{i440BX}: Enable console in bootblock ......................................................................
mb/*/*{i440BX}: Enable console in bootblock
This renames and links romstage.c into both the bootblock and the romstage. The definition of spd_read_byte needs to be guarded in bootblock as the declaration is only done in bootblock.
The bootblock size grows beyond 8K so the size needs to be increased to 16K. With many boards featuring only a 256KiB flash it might be a good idea to change the console defaults for postcar as there is not much space left for even smaller payloads like SeaBIOS.
Change-Id: I87e5eb93c15a72f790739eff8395e7eecbf1eb04 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/cpu/intel/slot_1/Kconfig A src/mainboard/asus/p2b-d/Makefile.inc R src/mainboard/asus/p2b-d/early_init.c A src/mainboard/asus/p2b-ds/Makefile.inc R src/mainboard/asus/p2b-ds/early_init.c A src/mainboard/asus/p2b-f/Makefile.inc R src/mainboard/asus/p2b-f/early_init.c A src/mainboard/asus/p2b-ls/Makefile.inc R src/mainboard/asus/p2b-ls/early_init.c A src/mainboard/asus/p2b/Makefile.inc R src/mainboard/asus/p2b/early_init.c A src/mainboard/asus/p3b-f/Makefile.inc R src/mainboard/asus/p3b-f/early_init.c M src/northbridge/intel/i440bx/Kconfig M src/southbridge/intel/i82371eb/i82371eb.h 15 files changed, 48 insertions(+), 23 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/36775/6
Hello Kyösti Mälkki, Keith Hui, Patrick Rudolph, build bot (Jenkins), Branden Waldner, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36775
to look at the new patch set (#7).
Change subject: mb/*/*{i440BX}: Enable console in bootblock ......................................................................
mb/*/*{i440BX}: Enable console in bootblock
This renames and links romstage.c into both the bootblock and the romstage. The definition of spd_read_byte needs to be guarded in bootblock as the declaration is only done in bootblock.
The bootblock size grows beyond 8K so the size needs to be increased to 16K. With many boards featuring only a 256KiB flash it might be a good idea to change the console defaults for postcar as there is not much space left for even smaller payloads like SeaBIOS.
Change-Id: I87e5eb93c15a72f790739eff8395e7eecbf1eb04 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/cpu/intel/slot_1/Kconfig A src/mainboard/asus/p2b-d/Makefile.inc R src/mainboard/asus/p2b-d/early_init.c A src/mainboard/asus/p2b-ds/Makefile.inc R src/mainboard/asus/p2b-ds/early_init.c A src/mainboard/asus/p2b-f/Makefile.inc R src/mainboard/asus/p2b-f/early_init.c A src/mainboard/asus/p2b-ls/Makefile.inc R src/mainboard/asus/p2b-ls/early_init.c A src/mainboard/asus/p2b/Makefile.inc R src/mainboard/asus/p2b/early_init.c A src/mainboard/asus/p3b-f/Makefile.inc R src/mainboard/asus/p3b-f/early_init.c M src/northbridge/intel/i440bx/Kconfig M src/southbridge/intel/i82371eb/i82371eb.h 15 files changed, 47 insertions(+), 23 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/36775/7
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36775 )
Change subject: mb/*/*{i440BX}: Enable console in bootblock ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36775/5/src/mainboard/asus/p2b-ls/e... File src/mainboard/asus/p2b-ls/early_init.c:
https://review.coreboot.org/c/coreboot/+/36775/5/src/mainboard/asus/p2b-ls/e... PS5, Line 46: #endif
Other file only guards spd_read_byte().
Done
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36775 )
Change subject: mb/*/*{i440BX}: Enable console in bootblock ......................................................................
Patch Set 7:
(2 comments)
https://review.coreboot.org/c/coreboot/+/36775/5/src/cpu/intel/slot_1/Kconfi... File src/cpu/intel/slot_1/Kconfig:
https://review.coreboot.org/c/coreboot/+/36775/5/src/cpu/intel/slot_1/Kconfi... PS5, Line 44: hex how about
default 0x2000 if !BOOTBLOCK_CONSOLE
https://review.coreboot.org/c/coreboot/+/36775/5/src/mainboard/asus/p2b-ls/e... File src/mainboard/asus/p2b-ls/early_init.c:
https://review.coreboot.org/c/coreboot/+/36775/5/src/mainboard/asus/p2b-ls/e... PS5, Line 46: #endif
Done
Why guard it at all?
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36775 )
Change subject: mb/*/*{i440BX}: Enable console in bootblock ......................................................................
Patch Set 7:
(2 comments)
https://review.coreboot.org/c/coreboot/+/36775/5/src/cpu/intel/slot_1/Kconfi... File src/cpu/intel/slot_1/Kconfig:
https://review.coreboot.org/c/coreboot/+/36775/5/src/cpu/intel/slot_1/Kconfi... PS5, Line 44: hex
how about
default 0x2000 if !BOOTBLOCK_CONSOLE
I'll check if it's also fine with the XIP cache code.
https://review.coreboot.org/c/coreboot/+/36775/5/src/mainboard/asus/p2b-ls/e... File src/mainboard/asus/p2b-ls/early_init.c:
https://review.coreboot.org/c/coreboot/+/36775/5/src/mainboard/asus/p2b-ls/e... PS5, Line 46: #endif
Why guard it at all?
early_smbus.c needs to be linked in the bootblock and smbus_read_byte needs to be guarded in the header to not conflict in ramstage.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36775 )
Change subject: mb/*/*{i440BX}: Enable console in bootblock ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36775/5/src/mainboard/asus/p2b-ls/e... File src/mainboard/asus/p2b-ls/early_init.c:
https://review.coreboot.org/c/coreboot/+/36775/5/src/mainboard/asus/p2b-ls/e... PS5, Line 46: #endif
Why guard it at all?
early_smbus.c needs to be linked in the bootblock
I don't think so, garbage collection should take care of it before it tries to link it.
and smbus_read_byte needs to be guarded in the header to not conflict in ramstage.
Only if `device/smbus.h` is included as well. I don't see any conditional includes, I'm confused.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36775 )
Change subject: mb/*/*{i440BX}: Enable console in bootblock ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36775/5/src/mainboard/asus/p2b-ls/e... File src/mainboard/asus/p2b-ls/early_init.c:
https://review.coreboot.org/c/coreboot/+/36775/5/src/mainboard/asus/p2b-ls/e... PS5, Line 46: #endif
Why guard it at all? […]
Meh, was looking at the wrong southbridge. `i82371eb/smbus.c` is the trouble maker.
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36775 )
Change subject: mb/*/*{i440BX}: Enable console in bootblock ......................................................................
Patch Set 7:
Clean up on smbus prototypes would be welcome indeed.
Branden Waldner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36775 )
Change subject: mb/*/*{i440BX}: Enable console in bootblock ......................................................................
Patch Set 7:
I successfully boot tested patch set 7 on my asus/P2B and asus/P2-99
Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36775 )
Change subject: mb/*/*{i440BX}: Enable console in bootblock ......................................................................
Patch Set 7:
This concept has also been tested on asus/p2b-ls. However, I see nothing interesting during bootblock stage. Since it made the bootblock significantly larger, I would want this to be a compile time option, that would also see serial enabled during bootblock (and no need to do it again during romstage.)
Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36775 )
Change subject: mb/*/*{i440BX}: Enable console in bootblock ......................................................................
Patch Set 7:
Let's do this after we fold all the i440BX boards into variants of asus/p2b (CB:38621), then put the code under mainboard where it's supposed to be.
Arthur Heymans has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/36775 )
Change subject: mb/*/*{i440BX}: Enable console in bootblock ......................................................................
Abandoned
Does not rebase nicely at all, will start from scratch
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Arthur Heymans (Code Review) -
Branden Waldner (Code Review)
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Keith Hui (Code Review)
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Kyösti Mälkki (Code Review)
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Nico Huber (Code Review)