Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/28084 )
Change subject: google/grunt: Remove BayHub EMMC driving strength override ......................................................................
google/grunt: Remove BayHub EMMC driving strength override
Side effect was observed that after override BayHub EMMC driving strength to the max, EMMC CLK will be reduced to 51.x Mhz from 200 Mhz.
This will cause OS installation fail on Samsung EMMC sku.
BUG=b:111964336 BRANCH=master TEST=emerge-grunt coreboot Change-Id: I848ab0cae474b15fbc4264c8ade63d5c6b4e489d Signed-off-by: Kevin Chiu Kevin.Chiu@quantatw.com Reviewed-on: https://review.coreboot.org/28084 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Martin Roth martinroth@google.com --- M src/mainboard/google/kahlee/variants/baseboard/mainboard.c 1 file changed, 0 insertions(+), 25 deletions(-)
Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved
diff --git a/src/mainboard/google/kahlee/variants/baseboard/mainboard.c b/src/mainboard/google/kahlee/variants/baseboard/mainboard.c index b1bd492..cf38b99 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/mainboard.c +++ b/src/mainboard/google/kahlee/variants/baseboard/mainboard.c @@ -17,8 +17,6 @@ #include <baseboard/variants.h> #include <gpio.h> #include <variant/gpio.h> -#include <device/pci.h> -#include <drivers/generic/bayhub/bh720.h>
uint8_t variant_board_sku(void) { @@ -37,26 +35,3 @@ gpio_set(GPIO_133, 0); } #endif - -void bh720_driving_strength(struct device *dev) -{ - u32 sdbar; - u32 bh720_pcr_data; - - sdbar = pci_read_config32(dev, PCI_BASE_ADDRESS_1); - - /* Enable Memory Access Function */ - write32((void *)(sdbar + BH720_MEM_ACCESS_EN), 0x40000000); - write32((void *)(sdbar + BH720_MEM_RW_DATA), 0x80000000); - write32((void *)(sdbar + BH720_MEM_RW_ADR), 0x800000D0); - - /* Read current EMMC 1.8V CLK/DATA,CMD driving strength */ - write32((void *)(sdbar + BH720_MEM_RW_ADR), 0x40000304); - bh720_pcr_data = read32((void *)(sdbar + BH720_MEM_RW_DATA)); - - /* set EMMC 1.8V CLK/DATA,CMD the max level */ - write32((void *)(sdbar + BH720_MEM_RW_DATA), - bh720_pcr_data | (BH720_PCR_CLK_DRV_MAX << 4) | - (BH720_PCR_DATA_CMD_DRV_MAX << 1)); - write32((void *)(sdbar + BH720_MEM_RW_ADR), 0x80000304); -}