Change in coreboot[master]: amd/stoneyridge: Add PM defintions to southbridge.h

[Marshall Dawson (Code Review)]

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/21747

Change subject: amd/stoneyridge: Add PM defintions to southbridge.h
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amd/stoneyridge: Add PM defintions to southbridge.h

Change-Id: I2534ab34f8a8d151e80004ee05d3061f013316b0
Signed-off-by: Marshall Dawson 
---
M src/soc/amd/stoneyridge/include/soc/southbridge.h
1 file changed, 5 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/21747/1

diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 9f353fb..fdb0995 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -42,6 +42,9 @@
 #define PM2_INDEX			0xcd0
 #define PM2_DATA			0xcd1

+#define PM_PCI_CTRL			0x08
+#define   FORCE_SLPSTATE_RETRY		BIT(25)
+#define   FORCE_STPCLK_RETRY		BIT(24)
 #define PM_ACPI_MMIO_EN			0x24
 #define PM_SERIRQ_CONF			0x54
 #define PM_EVT_BLK			0x60
@@ -51,6 +54,8 @@
 #define PM_GPE0_BLK			0x68
 #define PM_ACPI_SMI_CMD			0x6a
 #define PM_ACPI_CONF			0x74
+#define PM_RST_CTRL1			0xbe
+#define   SLPTYPE_CONTROL_EN		BIT(5)
 #define PM_PMIO_DEBUG			0xd2
 #define PM_MANUAL_RESET			0xd3
 #define PM_HUD_SD_FLASH_CTRL		0xe7