Change in coreboot[master]: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables
Johnny Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables ......................................................................
mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables
Add VPD variables for enabling/disabling FRB2 watchdog timer and setting the timer countdown value. By default it would start the timer and trigger hard reset when it's expired. The timer is expected to be stopped later by payload or OS.
Added RO_VPD and RW_VPD sections.
Tested on OCP Tioga Pass.
Change-Id: I53b69c3c5d22c022130fd812ef26097898d913d0 Signed-off-by: Johnny Lin johnny_lin@wiwynn.com --- M src/mainboard/ocp/tiogapass/Kconfig M src/mainboard/ocp/tiogapass/board.fmd M src/mainboard/ocp/tiogapass/ramstage.c 3 files changed, 45 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/39690/1
diff --git a/src/mainboard/ocp/tiogapass/Kconfig b/src/mainboard/ocp/tiogapass/Kconfig index 9dbc066..9a9c3f0 100644 --- a/src/mainboard/ocp/tiogapass/Kconfig +++ b/src/mainboard/ocp/tiogapass/Kconfig @@ -23,6 +23,7 @@ select MAINBOARD_USES_FSP2_0 select FSP_CAR select IPMI_KCS + select VPD
config MAINBOARD_DIR string diff --git a/src/mainboard/ocp/tiogapass/board.fmd b/src/mainboard/ocp/tiogapass/board.fmd index 1e3fda7..83a110a 100644 --- a/src/mainboard/ocp/tiogapass/board.fmd +++ b/src/mainboard/ocp/tiogapass/board.fmd @@ -6,6 +6,8 @@ } SI_BIOS@0x1000000 0x1000000 { FMAP@0x0 0x800 - COREBOOT(CBFS)@0x800 0xfff800 + RO_VPD@0x800 0x4000 + RW_VPD@0x4800 0x4000 + COREBOOT(CBFS)@0x8800 0xff7800 } } diff --git a/src/mainboard/ocp/tiogapass/ramstage.c b/src/mainboard/ocp/tiogapass/ramstage.c index 639874b..8e1123c 100644 --- a/src/mainboard/ocp/tiogapass/ramstage.c +++ b/src/mainboard/ocp/tiogapass/ramstage.c @@ -15,16 +15,57 @@ #include <soc/ramstage.h> #include <pc80/mc146818rtc.h> #include <cf9_reset.h> +#include <drivers/vpd/vpd.h> +#include <console/console.h> +#include <drivers/ipmi/ipmi_ops.h> +#include <string.h> #include "ipmi.h" +/* VPD variable for enabling/disabling FRB2 timer. */ +#define FRB2_TIMER "FRB2_TIMER" +/* VPD variable for setting FRB2 timer countdown value. */ +#define FRB2_COUNTDOWN "FRB2_COUNTDOWN" +#define VPD_LEN 10 +/* Default countdown is 15 minutes. */ +#define DEFAULT_COUNTDOWN 9000
void mainboard_silicon_init_params(FSPS_UPD *params) { }
+static void init_frb2_wdt(void) +{ + + char val[VPD_LEN]; + /* Enable FRB2 timer by default. */ + u8 enable = 1; + uint16_t countdown; + + if (vpd_get_bool(FRB2_TIMER, VPD_RW, &enable)) { + if (!enable) { + printk(BIOS_DEBUG, "Disable FRB2 timer\n"); + ipmi_stop_bmc_wdt(BMC_KCS_BASE); + } + } + if (enable) { + if (vpd_gets(FRB2_COUNTDOWN, val, VPD_LEN, VPD_RW)) { + countdown = (uint16_t)atol(val); + printk(BIOS_DEBUG, "FRB2 timer countdown set to: %d\n", + countdown); + } else { + printk(BIOS_DEBUG, "FRB2 timer use default value: %d\n", + DEFAULT_COUNTDOWN); + countdown = DEFAULT_COUNTDOWN; + } + ipmi_init_and_start_bmc_wdt(BMC_KCS_BASE, countdown, + TIMEOUT_HARD_RESET); + } +} + static void mainboard_enable(struct device *dev) { ipmi_oem_rsp_t rsp;
+ init_frb2_wdt(); if (is_ipmi_clear_cmos_set(&rsp)) { cmos_init(1); clear_ipmi_flags(&rsp);
Johnny Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables ......................................................................
Patch Set 1:
Same function has been done for Mono Lake. https://review.coreboot.org/c/coreboot/+/36180
Hello build bot (Jenkins), Jonathan Zhang, David Hendricks, Jingle Hsu, Morgan Jang, Andrey Petrov,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39690
to look at the new patch set (#2).
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables ......................................................................
mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables
Add VPD variables for enabling/disabling FRB2 watchdog timer and setting the timer countdown value. By default it would start the timer and trigger hard reset when it's expired. The timer is expected to be stopped later by payload or OS.
Added RO_VPD and RW_VPD sections.
Tested on OCP Tioga Pass.
Change-Id: I53b69c3c5d22c022130fd812ef26097898d913d0 Signed-off-by: Johnny Lin johnny_lin@wiwynn.com --- M src/mainboard/ocp/tiogapass/Kconfig M src/mainboard/ocp/tiogapass/board.fmd M src/mainboard/ocp/tiogapass/ramstage.c 3 files changed, 54 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/39690/2
Hello build bot (Jenkins), Jonathan Zhang, David Hendricks, Jingle Hsu, Morgan Jang, Andrey Petrov,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39690
to look at the new patch set (#3).
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables ......................................................................
mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables
Add VPD variables for enabling/disabling FRB2 watchdog timer and setting the timer countdown value. By default it would start the timer and trigger hard reset when it's expired. The timer is expected to be stopped later by payload or OS.
Added RO_VPD and RW_VPD sections.
Tested on OCP Tioga Pass.
Change-Id: I53b69c3c5d22c022130fd812ef26097898d913d0 Signed-off-by: Johnny Lin johnny_lin@wiwynn.com --- M src/mainboard/ocp/tiogapass/Kconfig M src/mainboard/ocp/tiogapass/board.fmd M src/mainboard/ocp/tiogapass/ramstage.c 3 files changed, 54 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/39690/3
Hello build bot (Jenkins), Jonathan Zhang, David Hendricks, Jingle Hsu, Morgan Jang, Andrey Petrov,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39690
to look at the new patch set (#4).
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables ......................................................................
mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables
Add VPD variables for enabling/disabling FRB2 watchdog timer and setting the timer countdown value. By default it would start the timer and trigger hard reset when it's expired. The timer is expected to be stopped later by payload or OS.
Added RO_VPD and RW_VPD sections.
Tested on OCP Tioga Pass.
Change-Id: I53b69c3c5d22c022130fd812ef26097898d913d0 Signed-off-by: Johnny Lin johnny_lin@wiwynn.com --- M src/mainboard/ocp/tiogapass/Kconfig M src/mainboard/ocp/tiogapass/board.fmd M src/mainboard/ocp/tiogapass/ramstage.c 3 files changed, 54 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/39690/4
Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables ......................................................................
Patch Set 4: Code-Review+1
LGTM
Andrey Petrov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39690/4/src/mainboard/ocp/tiogapass... File src/mainboard/ocp/tiogapass/ramstage.c:
https://review.coreboot.org/c/coreboot/+/39690/4/src/mainboard/ocp/tiogapass... PS4, Line 33: init_frb2_wdt is this functionality specific to this motherboard only, all other OCP boards use same thing?
Johnny Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39690/4/src/mainboard/ocp/tiogapass... File src/mainboard/ocp/tiogapass/ramstage.c:
https://review.coreboot.org/c/coreboot/+/39690/4/src/mainboard/ocp/tiogapass... PS4, Line 33: init_frb2_wdt
is this functionality specific to this motherboard only, all other OCP boards use same thing?
The starting and stopping IPMI watchdog part is the standard IPMI BMC watchdog, which should be board independent. The VPD variable reading part so far is only implemented for Mono Lake and Tioga Pass, this is to mimick the FRB2 timer configuration feature in UEFI BIOS.
Andrey Petrov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39690/4/src/mainboard/ocp/tiogapass... File src/mainboard/ocp/tiogapass/ramstage.c:
https://review.coreboot.org/c/coreboot/+/39690/4/src/mainboard/ocp/tiogapass... PS4, Line 33: init_frb2_wdt
The starting and stopping IPMI watchdog part is the standard IPMI BMC watchdog, which should be boar […]
oh I see. It feels then we would end up duplicating this functionality on every OCP mainboard. Shall we just move this common mb code in vendorcode? David, whats is your take on this?
Hello build bot (Jenkins), Jonathan Zhang, David Hendricks, Jingle Hsu, Morgan Jang, Andrey Petrov,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39690
to look at the new patch set (#5).
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage ......................................................................
mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage
Add VPD variables for enabling/disabling FRB2 watchdog timer and setting the timer countdown value. By default it would start the timer and trigger hard reset when it's expired. The timer is expected to be stopped later by payload or OS.
Added RO_VPD and RW_VPD sections.
Tested on OCP Tioga Pass.
Change-Id: I53b69c3c5d22c022130fd812ef26097898d913d0 Signed-off-by: Johnny Lin johnny_lin@wiwynn.com --- M src/mainboard/ocp/tiogapass/Kconfig M src/mainboard/ocp/tiogapass/board.fmd M src/mainboard/ocp/tiogapass/romstage.c 3 files changed, 47 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/39690/5
Hello build bot (Jenkins), Jonathan Zhang, David Hendricks, Jingle Hsu, Morgan Jang, Andrey Petrov,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39690
to look at the new patch set (#7).
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage ......................................................................
mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage
Add VPD variables for enabling/disabling FRB2 watchdog timer and setting the timer countdown value. By default it would start the timer and trigger hard reset when it's expired. The timer is expected to be stopped later by payload or OS.
Added RO_VPD and RW_VPD sections.
Tested on OCP Tioga Pass.
Change-Id: I53b69c3c5d22c022130fd812ef26097898d913d0 Signed-off-by: Johnny Lin johnny_lin@wiwynn.com --- M src/mainboard/ocp/tiogapass/Kconfig M src/mainboard/ocp/tiogapass/board.fmd M src/mainboard/ocp/tiogapass/romstage.c 3 files changed, 49 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/39690/7
Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage ......................................................................
Patch Set 8:
(3 comments)
Thanks!
https://review.coreboot.org/c/coreboot/+/39690/8/src/mainboard/ocp/tiogapass... File src/mainboard/ocp/tiogapass/romstage.c:
https://review.coreboot.org/c/coreboot/+/39690/8/src/mainboard/ocp/tiogapass... PS8, Line 79: } Why not just return from here? In this case, we do not need if (enable) {..} after this.
https://review.coreboot.org/c/coreboot/+/39690/8/src/mainboard/ocp/tiogapass... PS8, Line 84: printk(BIOS_DEBUG, "FRB2 timer countdown set to: %d\n", Let's print out time unit here as well.
https://review.coreboot.org/c/coreboot/+/39690/8/src/mainboard/ocp/tiogapass... PS8, Line 99: init_frb2_wdt(); If BMC is not up, we need to skip BMC interaction, including WDT initialization.
Hello build bot (Jenkins), Jonathan Zhang, David Hendricks, Jingle Hsu, Morgan Jang, Andrey Petrov,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39690
to look at the new patch set (#9).
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage ......................................................................
mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage
Add VPD variables for enabling/disabling FRB2 watchdog timer and setting the timer countdown value. By default it would start the timer and trigger hard reset when it's expired. The timer is expected to be stopped later by payload or OS.
Added RO_VPD and RW_VPD sections.
Tested on OCP Tioga Pass.
Change-Id: I53b69c3c5d22c022130fd812ef26097898d913d0 Signed-off-by: Johnny Lin johnny_lin@wiwynn.com --- M src/mainboard/ocp/tiogapass/Kconfig M src/mainboard/ocp/tiogapass/board.fmd M src/mainboard/ocp/tiogapass/romstage.c 3 files changed, 50 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/39690/9
Johnny Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage ......................................................................
Patch Set 10:
(3 comments)
https://review.coreboot.org/c/coreboot/+/39690/8/src/mainboard/ocp/tiogapass... File src/mainboard/ocp/tiogapass/romstage.c:
https://review.coreboot.org/c/coreboot/+/39690/8/src/mainboard/ocp/tiogapass... PS8, Line 79: }
Why not just return from here? In this case, we do not need if (enable) {..} after this.
Done
https://review.coreboot.org/c/coreboot/+/39690/8/src/mainboard/ocp/tiogapass... PS8, Line 84: printk(BIOS_DEBUG, "FRB2 timer countdown set to: %d\n",
Let's print out time unit here as well.
Done
https://review.coreboot.org/c/coreboot/+/39690/8/src/mainboard/ocp/tiogapass... PS8, Line 99: init_frb2_wdt();
If BMC is not up, we need to skip BMC interaction, including WDT initialization.
Done
Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage ......................................................................
Patch Set 10: Code-Review+1
LGTM
Hello build bot (Jenkins), Jonathan Zhang, David Hendricks, Jingle Hsu, Morgan Jang, Andrey Petrov,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39690
to look at the new patch set (#11).
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage ......................................................................
mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage
Add VPD variables for enabling/disabling FRB2 watchdog timer and setting the timer countdown value. By default it would start the timer and trigger hard reset when it's expired. The timer is expected to be stopped later by payload or OS.
Added RO_VPD and RW_VPD sections.
Tested on OCP Tioga Pass.
Change-Id: I53b69c3c5d22c022130fd812ef26097898d913d0 Signed-off-by: Johnny Lin johnny_lin@wiwynn.com --- M src/mainboard/ocp/tiogapass/Kconfig M src/mainboard/ocp/tiogapass/board.fmd M src/mainboard/ocp/tiogapass/romstage.c 3 files changed, 50 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/39690/11
Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage ......................................................................
Patch Set 12: Code-Review+1
Andrey Petrov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage ......................................................................
Patch Set 15:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39690/15/src/mainboard/ocp/tiogapas... File src/mainboard/ocp/tiogapass/romstage.c:
https://review.coreboot.org/c/coreboot/+/39690/15/src/mainboard/ocp/tiogapas... PS15, Line 75: if (vpd_get_bool(FRB2_TIMER, VPD_RW, &enable)) { : if (!enable) { : printk(BIOS_DEBUG, "Disable FRB2 timer\n"); : ipmi_stop_bmc_wdt(BMC_KCS_BASE); : return; : } : } so the strategy is to enable timer even if we are not sure it was meant to be enabled? Could you please elaborate why do we do it in this specific way? I personally feel it is rather not turn something on that is potentially destructive
Johnny Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage ......................................................................
Patch Set 15:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39690/15/src/mainboard/ocp/tiogapas... File src/mainboard/ocp/tiogapass/romstage.c:
https://review.coreboot.org/c/coreboot/+/39690/15/src/mainboard/ocp/tiogapas... PS15, Line 75: if (vpd_get_bool(FRB2_TIMER, VPD_RW, &enable)) { : if (!enable) { : printk(BIOS_DEBUG, "Disable FRB2 timer\n"); : ipmi_stop_bmc_wdt(BMC_KCS_BASE); : return; : } : }
so the strategy is to enable timer even if we are not sure it was meant to be enabled? Could you ple […]
It's according to the BIOS requirement, it says before MP, the default setting is enabled but no action needed, after MP the default is enabled and will reset system after timer expiration. In this change it can control enable/disable via VPD but action is always TIMEOUT_HARD_RESET when enabled, so the complete implementation should also make it configurable via VPD. Here default action set to TIMEOUT_HARD_RESET is meant for MP stage.
Andrey Petrov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage ......................................................................
Patch Set 15: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/39690/15/src/mainboard/ocp/tiogapas... File src/mainboard/ocp/tiogapass/romstage.c:
https://review.coreboot.org/c/coreboot/+/39690/15/src/mainboard/ocp/tiogapas... PS15, Line 75: if (vpd_get_bool(FRB2_TIMER, VPD_RW, &enable)) { : if (!enable) { : printk(BIOS_DEBUG, "Disable FRB2 timer\n"); : ipmi_stop_bmc_wdt(BMC_KCS_BASE); : return; : } : }
It's according to the BIOS requirement, it says before MP, the default setting is enabled but no act […]
ah ok, thanks for clarification
Hello build bot (Jenkins), Jonathan Zhang, David Hendricks, Jingle Hsu, Morgan Jang, Andrey Petrov,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39690
to look at the new patch set (#16).
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage ......................................................................
mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage
Add VPD variables for enabling/disabling FRB2 watchdog timer and setting the timer countdown value. By default it would start the timer and trigger hard reset when it's expired. The timer is expected to be stopped later by payload or OS.
Added RO_VPD and RW_VPD sections.
Tested on OCP Tioga Pass.
Change-Id: I53b69c3c5d22c022130fd812ef26097898d913d0 Signed-off-by: Johnny Lin johnny_lin@wiwynn.com --- M src/mainboard/ocp/tiogapass/Kconfig M src/mainboard/ocp/tiogapass/board.fmd M src/mainboard/ocp/tiogapass/romstage.c 3 files changed, 49 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/39690/16
Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage ......................................................................
Patch Set 18: Code-Review+1
Hello build bot (Jenkins), Jonathan Zhang, David Hendricks, Jingle Hsu, Morgan Jang, Andrey Petrov,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39690
to look at the new patch set (#26).
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage ......................................................................
mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage
Add VPD variables for enabling/disabling FRB2 watchdog timer and setting the timer countdown value. By default it would start the timer and trigger hard reset when it's expired. The timer is expected to be stopped later by payload or OS.
Added RO_VPD and RW_VPD sections.
Tested on OCP Tioga Pass.
Change-Id: I53b69c3c5d22c022130fd812ef26097898d913d0 Signed-off-by: Johnny Lin johnny_lin@wiwynn.com --- M src/mainboard/ocp/tiogapass/Kconfig M src/mainboard/ocp/tiogapass/Makefile.inc M src/mainboard/ocp/tiogapass/board.fmd M src/mainboard/ocp/tiogapass/ipmi.c M src/mainboard/ocp/tiogapass/ipmi.h M src/mainboard/ocp/tiogapass/romstage.c 6 files changed, 54 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/39690/26
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Jonathan Zhang, David Hendricks, Jingle Hsu, Morgan Jang, Andrey Petrov,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39690
to look at the new patch set (#27).
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage ......................................................................
mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage
Add VPD variables for enabling/disabling FRB2 watchdog timer and setting the timer countdown value. By default it would start the timer and trigger hard reset when it's expired. The timer is expected to be stopped later by payload or OS.
Added RO_VPD and RW_VPD sections.
Tested on OCP Tioga Pass.
Change-Id: I53b69c3c5d22c022130fd812ef26097898d913d0 Signed-off-by: Johnny Lin johnny_lin@wiwynn.com --- M src/mainboard/ocp/tiogapass/Kconfig M src/mainboard/ocp/tiogapass/Makefile.inc M src/mainboard/ocp/tiogapass/board.fmd M src/mainboard/ocp/tiogapass/ipmi.c M src/mainboard/ocp/tiogapass/ipmi.h M src/mainboard/ocp/tiogapass/romstage.c 6 files changed, 61 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/39690/27
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Jonathan Zhang, David Hendricks, Jingle Hsu, Morgan Jang, Andrey Petrov,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39690
to look at the new patch set (#28).
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage ......................................................................
mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage
Add VPD variables for enabling/disabling FRB2 watchdog timer and setting the timer countdown value. By default it would start the timer and trigger hard reset when it's expired. The timer is expected to be stopped later by payload or OS.
Added RO_VPD and RW_VPD sections.
Tested on OCP Tioga Pass.
Change-Id: I53b69c3c5d22c022130fd812ef26097898d913d0 Signed-off-by: Johnny Lin johnny_lin@wiwynn.com --- M src/mainboard/ocp/tiogapass/Kconfig M src/mainboard/ocp/tiogapass/Makefile.inc M src/mainboard/ocp/tiogapass/board.fmd M src/mainboard/ocp/tiogapass/ipmi.c M src/mainboard/ocp/tiogapass/ipmi.h M src/mainboard/ocp/tiogapass/romstage.c A src/mainboard/ocp/tiogapass/vpd.h 7 files changed, 68 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/39690/28
Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage ......................................................................
Patch Set 28: Code-Review+1
LGTM
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables in romstage ......................................................................
Patch Set 28: Code-Review+2
(2 comments)
https://review.coreboot.org/c/coreboot/+/39690/28//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39690/28//COMMIT_MSG@7 PS28, Line 7: variables in romstage nit: I'd drop this part from the commit message and mention romstage in the commit message body
https://review.coreboot.org/c/coreboot/+/39690/28//COMMIT_MSG@14 PS28, Line 14: Added Add
Hello Philipp Deppenwiese, build bot (Jenkins), Patrick Georgi, Martin Roth, Jonathan Zhang, Christian Walter, David Hendricks, Jingle Hsu, Angel Pons, Morgan Jang, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39690
to look at the new patch set (#29).
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables ......................................................................
mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables
Add VPD variables for enabling/disabling FRB2 watchdog timer and setting the timer countdown value in romstage. By default it would start the timer and trigger hard reset when it's expired. The timer is expected to be stopped later by payload or OS.
Add RO_VPD and RW_VPD sections.
Tested on OCP Tioga Pass.
Change-Id: I53b69c3c5d22c022130fd812ef26097898d913d0 Signed-off-by: Johnny Lin johnny_lin@wiwynn.com --- M src/mainboard/ocp/tiogapass/Kconfig M src/mainboard/ocp/tiogapass/Makefile.inc M src/mainboard/ocp/tiogapass/board.fmd M src/mainboard/ocp/tiogapass/ipmi.c M src/mainboard/ocp/tiogapass/ipmi.h M src/mainboard/ocp/tiogapass/romstage.c A src/mainboard/ocp/tiogapass/vpd.h 7 files changed, 68 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/39690/29
Hello Philipp Deppenwiese, build bot (Jenkins), Patrick Georgi, Martin Roth, Jonathan Zhang, Christian Walter, David Hendricks, Jingle Hsu, Angel Pons, Morgan Jang, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39690
to look at the new patch set (#30).
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables ......................................................................
mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables
Add VPD variables for enabling/disabling FRB2 watchdog timer and setting the timer countdown value in romstage. By default it would start the timer and trigger hard reset when it's expired. The timer is expected to be stopped later by payload or OS.
Add RO_VPD and RW_VPD sections.
Tested on OCP Tioga Pass.
Change-Id: I53b69c3c5d22c022130fd812ef26097898d913d0 Signed-off-by: Johnny Lin johnny_lin@wiwynn.com --- M src/mainboard/ocp/tiogapass/Kconfig M src/mainboard/ocp/tiogapass/Makefile.inc M src/mainboard/ocp/tiogapass/board.fmd M src/mainboard/ocp/tiogapass/ipmi.c M src/mainboard/ocp/tiogapass/ipmi.h M src/mainboard/ocp/tiogapass/romstage.c A src/mainboard/ocp/tiogapass/vpd.h 7 files changed, 68 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/39690/30
Johnny Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables ......................................................................
Patch Set 30:
(2 comments)
https://review.coreboot.org/c/coreboot/+/39690/28//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39690/28//COMMIT_MSG@7 PS28, Line 7: variables in romstage
nit: I'd drop this part from the commit message and mention romstage in the commit message body
Done
https://review.coreboot.org/c/coreboot/+/39690/28//COMMIT_MSG@14 PS28, Line 14: Added
Add
Done
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables ......................................................................
Patch Set 30:
(2 comments)
I'd like to get this patch rebased on master before submitting it, just in case.
https://review.coreboot.org/c/coreboot/+/39690/30/src/mainboard/ocp/tiogapas... File src/mainboard/ocp/tiogapass/ipmi.c:
https://review.coreboot.org/c/coreboot/+/39690/30/src/mainboard/ocp/tiogapas... PS30, Line 31: Unnecessary blank line
https://review.coreboot.org/c/coreboot/+/39690/30/src/mainboard/ocp/tiogapas... File src/mainboard/ocp/tiogapass/vpd.h:
https://review.coreboot.org/c/coreboot/+/39690/30/src/mainboard/ocp/tiogapas... PS30, Line 14: #endif Add a trailing comment:
#endif /* TIOGAPASS_VPD_H */
Hello Philipp Deppenwiese, build bot (Jenkins), Patrick Georgi, Martin Roth, Jonathan Zhang, Christian Walter, David Hendricks, Jingle Hsu, Angel Pons, Morgan Jang, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39690
to look at the new patch set (#31).
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables ......................................................................
mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables
Add VPD variables for enabling/disabling FRB2 watchdog timer and setting the timer countdown value in romstage. By default it would start the timer and trigger hard reset when it's expired. The timer is expected to be stopped later by payload or OS.
Add RO_VPD and RW_VPD sections.
Tested on OCP Tioga Pass.
Change-Id: I53b69c3c5d22c022130fd812ef26097898d913d0 Signed-off-by: Johnny Lin johnny_lin@wiwynn.com --- M src/mainboard/ocp/tiogapass/Kconfig M src/mainboard/ocp/tiogapass/Makefile.inc M src/mainboard/ocp/tiogapass/board.fmd M src/mainboard/ocp/tiogapass/ipmi.c M src/mainboard/ocp/tiogapass/ipmi.h M src/mainboard/ocp/tiogapass/romstage.c A src/mainboard/ocp/tiogapass/vpd.h 7 files changed, 67 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/39690/31
Johnny Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables ......................................................................
Patch Set 31:
(2 comments)
https://review.coreboot.org/c/coreboot/+/39690/30/src/mainboard/ocp/tiogapas... File src/mainboard/ocp/tiogapass/ipmi.c:
https://review.coreboot.org/c/coreboot/+/39690/30/src/mainboard/ocp/tiogapas... PS30, Line 31:
Unnecessary blank line
Done
https://review.coreboot.org/c/coreboot/+/39690/30/src/mainboard/ocp/tiogapas... File src/mainboard/ocp/tiogapass/vpd.h:
https://review.coreboot.org/c/coreboot/+/39690/30/src/mainboard/ocp/tiogapas... PS30, Line 14: #endif
Add a trailing comment: […]
Done
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables ......................................................................
Patch Set 31: Code-Review+2
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39690 )
Change subject: mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables ......................................................................
mb/ocp/tiogapass: Configure IPMI FRB2 watchdog timer via VPD variables
Add VPD variables for enabling/disabling FRB2 watchdog timer and setting the timer countdown value in romstage. By default it would start the timer and trigger hard reset when it's expired. The timer is expected to be stopped later by payload or OS.
Add RO_VPD and RW_VPD sections.
Tested on OCP Tioga Pass.
Change-Id: I53b69c3c5d22c022130fd812ef26097898d913d0 Signed-off-by: Johnny Lin johnny_lin@wiwynn.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/39690 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/ocp/tiogapass/Kconfig M src/mainboard/ocp/tiogapass/Makefile.inc M src/mainboard/ocp/tiogapass/board.fmd M src/mainboard/ocp/tiogapass/ipmi.c M src/mainboard/ocp/tiogapass/ipmi.h M src/mainboard/ocp/tiogapass/romstage.c A src/mainboard/ocp/tiogapass/vpd.h 7 files changed, 67 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/ocp/tiogapass/Kconfig b/src/mainboard/ocp/tiogapass/Kconfig index 79dafa7..67c1fa9 100644 --- a/src/mainboard/ocp/tiogapass/Kconfig +++ b/src/mainboard/ocp/tiogapass/Kconfig @@ -7,11 +7,13 @@ select BOARD_ROMSIZE_KB_32768 select HAVE_ACPI_TABLES select IPMI_KCS + select IPMI_KCS_ROMSTAGE select MAINBOARD_USES_FSP2_0 select OCP_DMI select PARALLEL_MP_AP_WORK select SOC_INTEL_SKYLAKE_SP select SUPERIO_ASPEED_AST2400 + select VPD
config MAINBOARD_DIR string diff --git a/src/mainboard/ocp/tiogapass/Makefile.inc b/src/mainboard/ocp/tiogapass/Makefile.inc index bb4a86b..2f7f327 100644 --- a/src/mainboard/ocp/tiogapass/Makefile.inc +++ b/src/mainboard/ocp/tiogapass/Makefile.inc @@ -1,6 +1,7 @@ ## SPDX-License-Identifier: GPL-2.0-or-later
bootblock-y += bootblock.c +romstage-y += ipmi.c ramstage-y += ramstage.c ipmi.c
CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include diff --git a/src/mainboard/ocp/tiogapass/board.fmd b/src/mainboard/ocp/tiogapass/board.fmd index 1e3fda7..2ecce06 100644 --- a/src/mainboard/ocp/tiogapass/board.fmd +++ b/src/mainboard/ocp/tiogapass/board.fmd @@ -5,7 +5,15 @@ PLATFORM_DATA@0xa26000 0x10000 } SI_BIOS@0x1000000 0x1000000 { - FMAP@0x0 0x800 - COREBOOT(CBFS)@0x800 0xfff800 + MISC_RW@0x0 0x10000 { + RW_VPD(PRESERVE)@0x0 0x4000 + } + WP_RO@0x10000 0xff0000 { + RO_VPD(PRESERVE)@0x0 0x4000 + RO_SECTION@0x4000 0xfec000 { + FMAP@0x0 0x800 + COREBOOT(CBFS)@0x800 0xfeb800 + } + } } } diff --git a/src/mainboard/ocp/tiogapass/ipmi.c b/src/mainboard/ocp/tiogapass/ipmi.c index aa50688..0cdf110 100644 --- a/src/mainboard/ocp/tiogapass/ipmi.c +++ b/src/mainboard/ocp/tiogapass/ipmi.c @@ -2,8 +2,12 @@
#include <console/console.h> #include <drivers/ipmi/ipmi_kcs.h> +#include <drivers/ipmi/ipmi_ops.h> +#include <drivers/vpd/vpd.h> +#include <string.h>
#include "ipmi.h" +#include "vpd.h"
void ipmi_set_ppin(struct ppin_req *req) { @@ -21,3 +25,32 @@ } printk(BIOS_DEBUG, "IPMI Set PPIN to BMC done.\n"); } + +void init_frb2_wdt(void) +{ + char val[VPD_LEN]; + /* Enable FRB2 timer by default. */ + u8 enable = 1; + uint16_t countdown; + + if (vpd_get_bool(FRB2_TIMER, VPD_RW_THEN_RO, &enable)) { + if (!enable) { + printk(BIOS_DEBUG, "Disable FRB2 timer\n"); + ipmi_stop_bmc_wdt(CONFIG_BMC_KCS_BASE); + return; + } + } + if (enable) { + if (vpd_gets(FRB2_COUNTDOWN, val, VPD_LEN, VPD_RW_THEN_RO)) { + countdown = (uint16_t)atol(val); + printk(BIOS_DEBUG, "FRB2 timer countdown set to: %d ms\n", + countdown * 100); + } else { + printk(BIOS_DEBUG, "FRB2 timer use default value: %d ms\n", + DEFAULT_COUNTDOWN * 100); + countdown = DEFAULT_COUNTDOWN; + } + ipmi_init_and_start_bmc_wdt(CONFIG_BMC_KCS_BASE, countdown, + TIMEOUT_HARD_RESET); + } +} diff --git a/src/mainboard/ocp/tiogapass/ipmi.h b/src/mainboard/ocp/tiogapass/ipmi.h index 3d2723f..798f312 100644 --- a/src/mainboard/ocp/tiogapass/ipmi.h +++ b/src/mainboard/ocp/tiogapass/ipmi.h @@ -16,4 +16,5 @@ } __packed; /* Send CPU0 and CPU1 PPIN to BMC */ void ipmi_set_ppin(struct ppin_req *req); +void init_frb2_wdt(void); #endif diff --git a/src/mainboard/ocp/tiogapass/romstage.c b/src/mainboard/ocp/tiogapass/romstage.c index b728c3a..fb2ce02 100644 --- a/src/mainboard/ocp/tiogapass/romstage.c +++ b/src/mainboard/ocp/tiogapass/romstage.c @@ -2,12 +2,15 @@
#include <fsp/api.h> #include <FspmUpd.h> +#include <drivers/ipmi/ipmi_kcs.h> #include <soc/romstage.h> #include <string.h> #include <gpio.h> #include <soc/lewisburg_pch_gpio_defs.h> #include <skxsp_tp_iio.h>
+#include "ipmi.h" + static uint8_t iio_table_buf[sizeof(tp_iio_bifur_table)];
static void oem_update_iio(FSPM_UPD *mupd) @@ -49,6 +52,9 @@
void mainboard_memory_init_params(FSPM_UPD *mupd) { + /* It's better to run get BMC selftest result first */ + if (ipmi_kcs_premem_init(CONFIG_BMC_KCS_BASE, 0) == CB_SUCCESS) + init_frb2_wdt(); mainboard_config_iio(mupd);
/* do not configure GPIO controller inside FSP-M */ diff --git a/src/mainboard/ocp/tiogapass/vpd.h b/src/mainboard/ocp/tiogapass/vpd.h new file mode 100644 index 0000000..63a92f6 --- /dev/null +++ b/src/mainboard/ocp/tiogapass/vpd.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef TIOGAPASS_VPD_H +#define TIOGAPASS_VPD_H + +/* VPD variable for enabling/disabling FRB2 timer. */ +#define FRB2_TIMER "frb2_timer" +/* VPD variable for setting FRB2 timer countdown value. */ +#define FRB2_COUNTDOWN "frb2_countdown" +#define VPD_LEN 10 +/* Default countdown is 15 minutes. */ +#define DEFAULT_COUNTDOWN 9000 + +#endif /* TIOGAPASS_VPD_H */
-
Andrey Petrov (Code Review) -
Angel Pons (Code Review)
-
Johnny Lin (Code Review)
-
Jonathan Zhang (Code Review)