20 Aug
2020
20 Aug
'20
7:04 a.m.
Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43816 )
Change subject: soc/intel/jasperlake: Disable multiphase SI init ......................................................................
Patch Set 9: Code-Review+2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I2d591b46c403e68ff0b41ac8f87c742ae774111e
Gerrit-Change-Number: 43816
Gerrit-PatchSet: 9
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Gerrit-Reviewer: Maulik V Vaghela maulik.v.vaghela@intel.com
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Gerrit-Comment-Date: Thu, 20 Aug 2020 07:04:10 +0000
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Maulik V Vaghela (Code Review)