Change in coreboot[master]: soc/intel/braswell: CACHE_MRC_SETTIGNS depends on !VBOOT_START_IN_ROM...

[Frans Hendriks (Code Review)]

Attention is currently required from: Arthur Heymans, Wim Vervoorn.
Hello build bot (Jenkins), Wim Vervoorn,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/52128

to look at the new patch set (#6).

Change subject: soc/intel/braswell: CACHE_MRC_SETTIGNS depends on !VBOOT_START_IN_ROMSTAGE
......................................................................

soc/intel/braswell: CACHE_MRC_SETTIGNS depends on !VBOOT_START_IN_ROMSTAGE

ASSERTION ERROR: file src/security/vboot/common.c, line 23 occurs when
reading RW_MRC_CACHE.
VBOOT starts in ROMSTAGE and MRC cache is loaded in early stage of
ROMSTAGE, before memory init.
There is not enough CAR space available for vboot workbuffer. CBMEM can
not be used since memory is not initialized. VBOOT uses workbuffer

When VBOOT starts in ROMSTAGE, do not use MRC cache data.

BUG = N/A
TEST = Build and boot facebook FBG1701 with VBOOT enabled and disabled.

Signed-off-by: Frans Hendriks 
Change-Id: Icfedfa82e746626f35e6f1d426a4de768c594b93
---
M src/soc/intel/braswell/Kconfig
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/52128/6