[S] Change in coreboot[main]: mb/google/brya/var/trulo: Add minimal devicetree entries to boot

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83546?usp=email )

Change subject: mb/google/brya/var/trulo: Add minimal devicetree entries to boot
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mb/google/brya/var/trulo: Add minimal devicetree entries to boot

This patch adds minimal device entries and chip configs for Trulo
overridetree.cb to boot.

BUG=b:351976770
TEST=Builds successfully for google/trulo.

Change-Id: Ic8b90dbaaabb439c347a891650d255948d48810a
Signed-off-by: Subrata Banik 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83546
Reviewed-by: Eric Lai 
Reviewed-by: Dinesh Gehlot 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/google/brya/variants/trulo/overridetree.cb
1 file changed, 26 insertions(+), 2 deletions(-)

Approvals:
  Eric Lai: Looks good to me, approved
  Dinesh Gehlot: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/src/mainboard/google/brya/variants/trulo/overridetree.cb b/src/mainboard/google/brya/variants/trulo/overridetree.cb
index 9285c33..9fba6ae 100644
--- a/src/mainboard/google/brya/variants/trulo/overridetree.cb
+++ b/src/mainboard/google/brya/variants/trulo/overridetree.cb
@@ -1,8 +1,32 @@
 chip soc/intel/alderlake
+	register "sagv" = "SaGv_Enabled"
+
+	# GPE configuration
+	register "pmc_gpe0_dw1" = "GPP_B"
+	register "pmc_gpe0_dw2" = "GPP_F"
+
+	# S0ix enable
+	register "s0ix_enable" = "1"

register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC1)"	# USB3/2 Type A port A0
     register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC2)"	# USB3/2 Type A port A1

-    device domain 0 on
-    end
+	device domain 0 on
+		device ref igpu on end
+		device ref shared_sram on end
+		device ref heci1 on end
+		device ref emmc on end
+		device ref ish on
+			chip drivers/intel/ish
+				register "add_acpi_dma_property" = "true"
+				device generic 0 on end
+			end
+		end
+		device ref ufs on end
+		device ref pch_espi on
+			chip ec/google/chromeec
+				device pnp 0c09.0 on end
+			end
+		end
+	end
 end