Change in coreboot[master]: mb/siemens/mc_ehl: Use 512 bytes for SPD buffer

[Paul Menzel (Code Review)]

Attention is currently required from: Mario Scheithauer, Werner Zeh.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62698 )

Change subject: mb/siemens/mc_ehl: Use 512 bytes for SPD buffer
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Patch Set 1:

(4 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/62698/comment/b883869b_e798c751 
PS1, Line 7: Use 512 bytes for SPD buffer
Maybe:
> Double SPD buffer size to 512 bytes

https://review.coreboot.org/c/coreboot/+/62698/comment/99cf87c6_6e8bc3b0 
PS1, Line 9: DDR4 SPD data needs to be 512 byte to comply with the spec.
           : Though there is no vital timing data used beyond 256 byte there are some
           : part information which will be used to show the part info in the
           : coreboot log. If the buffer is too small this log shows garbage.
Please add a blank line between paragraphs.

https://review.coreboot.org/c/coreboot/+/62698/comment/58e36fe2_043681ea 
PS1, Line 13: 
Maybe give an example line with garbled data?

File src/mainboard/siemens/mc_ehl/romstage_fsp_params.c:

https://review.coreboot.org/c/coreboot/+/62698/comment/0ecc486e_016377a7 
PS1, Line 28: 		hexdump(spd_data, sizeof(spd_data));
Is this debugging leftover?