Change in coreboot[master]: nb/intel/*: Don't align cbmem_top_chipset

[Arthur Heymans (Code Review)]

Attention is currently required from: Damien Zammit, Angel Pons.
Hello build bot (Jenkins), Damien Zammit, Angel Pons,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/64225

to look at the new patch set (#8).

Change subject: nb/intel/*: Don't align cbmem_top_chipset
......................................................................

nb/intel/*: Don't align cbmem_top_chipset

The code setting up postcar now makes sure MTRR usage is not
excessive. One positive upshot is that the unaligned memory is not
wasted anymore.

Tested on foxconn/g41m: both TSEG and cbmem are covered by MTRRs.

Change-Id: Ifc11570e9c59459725258c04cc6bbfe667bea4d5
Signed-off-by: Arthur Heymans 
---
M src/northbridge/intel/gm45/memmap.c
M src/northbridge/intel/gm45/northbridge.c
M src/northbridge/intel/i945/memmap.c
M src/northbridge/intel/i945/northbridge.c
M src/northbridge/intel/pineview/memmap.c
M src/northbridge/intel/pineview/northbridge.c
M src/northbridge/intel/x4x/memmap.c
M src/northbridge/intel/x4x/northbridge.c
8 files changed, 7 insertions(+), 63 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/64225/8