[XS] Change in coreboot[main]: Docs/mb/starlabs/labtop_cml.md: Fix footnote syntax

[Elyes Haouas (Code Review)]

Elyes Haouas has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85412?usp=email )

Change subject: Docs/mb/starlabs/labtop_cml.md: Fix footnote syntax
......................................................................

Docs/mb/starlabs/labtop_cml.md: Fix footnote syntax

Fix the syntax [1] for the footnote about the onboard memory
configuration so that it renders properly in the generated html.
This also fixes a "Unknown target name" error when building with
newer versions of Sphinx (tested with 8.1.3).

[1] https://myst-parser.readthedocs.io/en/latest/syntax/typography.html#footnote...

Change-Id: I07a85b854a181794f82d8e6a739063d66378d2c7
Signed-off-by: Nicholas Chin 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85412
Reviewed-by: Felix Singer 
Tested-by: build bot (Jenkins) 
Reviewed-by: Elyes Haouas 
---
M Documentation/mainboard/starlabs/labtop_cml.md
1 file changed, 2 insertions(+), 2 deletions(-)

Approvals:
  Felix Singer: Looks good to me, approved
  build bot (Jenkins): Verified
  Elyes Haouas: Looks good to me, approved

diff --git a/Documentation/mainboard/starlabs/labtop_cml.md b/Documentation/mainboard/starlabs/labtop_cml.md
index d9fdba5..e50db77 100644
--- a/Documentation/mainboard/starlabs/labtop_cml.md
+++ b/Documentation/mainboard/starlabs/labtop_cml.md
@@ -18,7 +18,7 @@
     - HDMI video
     - USB-C DisplayPort video
 - Memory
-    - 16GB on-board *1
+    - 16GB on-board [^1]
 - Networking
     - AX201 CNVi WiFi / Bluetooth soldered to PCBA
 - Sound
@@ -37,7 +37,7 @@
     - USB 3.1 Gen 2 Type-A (left)
     - USB 3.1 Gen 1 Type-A (right)

-[^1] The Comet Lake PCB supports multiple memory variations that are based on hardware configuration resistors see `src/mainboard/starlabs/labtop/variants/cml/romstage.c`
+[^1]: The Comet Lake PCB supports multiple memory variations that are based on hardware configuration resistors see `src/mainboard/starlabs/labtop/variants/cml/romstage.c`

## Building coreboot