Change in coreboot[master]: [TESTME] soc/amd/cezanne: add functionality to power down eMMC interface

[Felix Held (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson.
Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55537 )

Change subject: [TESTME] soc/amd/cezanne: add functionality to power down eMMC interface
......................................................................

[TESTME] soc/amd/cezanne: add functionality to power down eMMC interface

Power down the eMMC device via the AOAC interface when it's disabled.

BUG=b:184978118

Signed-off-by: Felix Held 
Change-Id: I18f4626a29fdc422218777058341b0eae401bcd4
---
M src/soc/amd/cezanne/chip.c
M src/soc/amd/cezanne/chipset.cb
2 files changed, 7 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/55537/1

diff --git a/src/soc/amd/cezanne/chip.c b/src/soc/amd/cezanne/chip.c
index 625f46c..f184cb5 100644
--- a/src/soc/amd/cezanne/chip.c
+++ b/src/soc/amd/cezanne/chip.c
@@ -1,10 +1,12 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

+#include <amdblocks/aoac.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <fsp/api.h>
 #include <soc/acpi.h>
+#include <soc/aoac_defs.h>
 #include <soc/cpu.h>
 #include <soc/data_fabric.h>
 #include <soc/pci_devs.h>
@@ -57,6 +59,10 @@
    case APU_UART1_BASE:
    	dev->ops = &cezanne_uart_mmio_ops;
    	break;
+	case APU_EMMC_BASE:
+		if (!dev->enabled)
+			power_off_aoac_device(FCH_AOAC_DEV_EMMC);
+		break;
    }
 }

diff --git a/src/soc/amd/cezanne/chipset.cb b/src/soc/amd/cezanne/chipset.cb
index bf44806..2c685c3 100644
--- a/src/soc/amd/cezanne/chipset.cb
+++ b/src/soc/amd/cezanne/chipset.cb
@@ -109,4 +109,5 @@
    device mmio 0xfedc5000 alias i2c_3 off end
    device mmio 0xfedc9000 alias uart_0 off end
    device mmio 0xfedca000 alias uart_1 off end
+	device mmio 0xfedd5000 alias emmc off end
 end