Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45189 )
Change subject: soc/intel/alderlake: Rename pch_init() code ......................................................................
soc/intel/alderlake: Rename pch_init() code
Rename the pch_init function to bootblock_pch_init.
Change-Id: Id2a89b2f64b58079062d79e07efbdcfad7ed3d2d Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/alderlake/bootblock/bootblock.c M src/soc/intel/alderlake/bootblock/pch.c M src/soc/intel/alderlake/include/soc/bootblock.h 3 files changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/45189/1
diff --git a/src/soc/intel/alderlake/bootblock/bootblock.c b/src/soc/intel/alderlake/bootblock/bootblock.c index e7d97c5..96e6268 100644 --- a/src/soc/intel/alderlake/bootblock/bootblock.c +++ b/src/soc/intel/alderlake/bootblock/bootblock.c @@ -25,7 +25,7 @@ void bootblock_soc_init(void) { report_platform_info(); - pch_init(); + bootblock_pch_init();
/* Programming TCO_BASE_ADDRESS and TCO Timer Halt */ tco_configure(); diff --git a/src/soc/intel/alderlake/bootblock/pch.c b/src/soc/intel/alderlake/bootblock/pch.c index 8452d83..b7d2c15 100644 --- a/src/soc/intel/alderlake/bootblock/pch.c +++ b/src/soc/intel/alderlake/bootblock/pch.c @@ -138,7 +138,7 @@ pch_enable_lpc(); }
-void pch_init(void) +void bootblock_pch_init(void) { /* * Enabling ABASE for accessing PM1_STS, PM1_EN, PM1_CNT, diff --git a/src/soc/intel/alderlake/include/soc/bootblock.h b/src/soc/intel/alderlake/include/soc/bootblock.h index 9816b31..087d29f 100644 --- a/src/soc/intel/alderlake/include/soc/bootblock.h +++ b/src/soc/intel/alderlake/include/soc/bootblock.h @@ -8,7 +8,7 @@ void bootblock_pch_early_init(void);
/* Bootblock post console init programming */ -void pch_init(void); +void bootblock_pch_init(void); void pch_early_iorange_init(void); void report_platform_info(void);
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45189 )
Change subject: soc/intel/alderlake: Rename pch_init() code ......................................................................
Patch Set 1: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/45189/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45189/1//COMMIT_MSG@9 PS1, Line 9: . Is this to make it consistent with other SoCs? Would be good to add a reason to commit message.
Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45189
to look at the new patch set (#2).
Change subject: soc/intel/alderlake: Rename pch_init() code ......................................................................
soc/intel/alderlake: Rename pch_init() code
Rename the pch_init function to bootblock_pch_init to maintain the parity with previous generation SoC code block.
Refer to commit 1201696.
Change-Id: Id2a89b2f64b58079062d79e07efbdcfad7ed3d2d Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/alderlake/bootblock/bootblock.c M src/soc/intel/alderlake/bootblock/pch.c M src/soc/intel/alderlake/include/soc/bootblock.h 3 files changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/45189/2
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45189 )
Change subject: soc/intel/alderlake: Rename pch_init() code ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45189/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45189/1//COMMIT_MSG@9 PS1, Line 9: .
Is this to make it consistent with other SoCs? Would be good to add a reason to commit message.
Thanks Furquan
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45189 )
Change subject: soc/intel/alderlake: Rename pch_init() code ......................................................................
Patch Set 2: Code-Review+2
Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45189 )
Change subject: soc/intel/alderlake: Rename pch_init() code ......................................................................
Patch Set 2: Code-Review+2
Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45189 )
Change subject: soc/intel/alderlake: Rename pch_init() code ......................................................................
soc/intel/alderlake: Rename pch_init() code
Rename the pch_init function to bootblock_pch_init to maintain the parity with previous generation SoC code block.
Refer to commit 1201696.
Change-Id: Id2a89b2f64b58079062d79e07efbdcfad7ed3d2d Signed-off-by: Subrata Banik subrata.banik@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45189 Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Maulik V Vaghela maulik.v.vaghela@intel.com Reviewed-by: Furquan Shaikh furquan@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/alderlake/bootblock/bootblock.c M src/soc/intel/alderlake/bootblock/pch.c M src/soc/intel/alderlake/include/soc/bootblock.h 3 files changed, 3 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Maulik V Vaghela: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/soc/intel/alderlake/bootblock/bootblock.c b/src/soc/intel/alderlake/bootblock/bootblock.c index e7d97c5..96e6268 100644 --- a/src/soc/intel/alderlake/bootblock/bootblock.c +++ b/src/soc/intel/alderlake/bootblock/bootblock.c @@ -25,7 +25,7 @@ void bootblock_soc_init(void) { report_platform_info(); - pch_init(); + bootblock_pch_init();
/* Programming TCO_BASE_ADDRESS and TCO Timer Halt */ tco_configure(); diff --git a/src/soc/intel/alderlake/bootblock/pch.c b/src/soc/intel/alderlake/bootblock/pch.c index 8452d83..b7d2c15 100644 --- a/src/soc/intel/alderlake/bootblock/pch.c +++ b/src/soc/intel/alderlake/bootblock/pch.c @@ -138,7 +138,7 @@ pch_enable_lpc(); }
-void pch_init(void) +void bootblock_pch_init(void) { /* * Enabling ABASE for accessing PM1_STS, PM1_EN, PM1_CNT, diff --git a/src/soc/intel/alderlake/include/soc/bootblock.h b/src/soc/intel/alderlake/include/soc/bootblock.h index 9816b31..087d29f 100644 --- a/src/soc/intel/alderlake/include/soc/bootblock.h +++ b/src/soc/intel/alderlake/include/soc/bootblock.h @@ -8,7 +8,7 @@ void bootblock_pch_early_init(void);
/* Bootblock post console init programming */ -void pch_init(void); +void bootblock_pch_init(void); void pch_early_iorange_init(void); void report_platform_info(void);
-
Angel Pons (Code Review) -
Furquan Shaikh (Code Review)
-
Maulik V Vaghela (Code Review)
-
Subrata Banik (Code Review)