Change in coreboot[master]: soc/intel/denverton_ns: Add UART Legacy mode with FSP traces - coreboot-gerrit

6 Feb 2018


      build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23623 )
Change subject: soc/intel/denverton_ns: Add UART Legacy mode with FSP traces
......................................................................
Patch Set 1: Verified+1
Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/67098/ : SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/21663/ : SUCCESS
-- 
To view, visit https://review.coreboot.org/23623
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: comment
Gerrit-Change-Id: Id8801e178ffd8eeee78ece07da7bd6b8dbd88538
Gerrit-Change-Number: 23623
Gerrit-PatchSet: 1
Gerrit-Owner: Julien Viard de Galbert jviarddegalbert@online.net
Gerrit-Reviewer: FEI WANG wangfei.jimei@gmail.com
Gerrit-Reviewer: Julien Viard de Galbert jviarddegalbert@online.net
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-Comment-Date: Tue, 06 Feb 2018 15:11:46 +0000
Gerrit-HasComments: No
Gerrit-HasLabels: Yes