Change in coreboot[master]: Revert "soc/intel/cnl: Enable HECI3 depending on devicetree"
Hello Felix Singer, build bot (Jenkins), Nico Huber, Jeremy Soller, Angel Pons, Patrick Rudolph,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/44994
to review the following change.
Change subject: Revert "soc/intel/cnl: Enable HECI3 depending on devicetree" ......................................................................
Revert "soc/intel/cnl: Enable HECI3 depending on devicetree"
This reverts commit d9e459428de519c89b23f9a7465bcb7b835c08a0.
Reason for revert: the Fsp option is not meant to be set that way
Change-Id: I1469ce3443e70c1ee5c841846ddeae7d4eebb9e5 --- M src/mainboard/prodrive/hermes/devicetree.cb M src/mainboard/purism/librem_whl/devicetree.cb M src/mainboard/system76/lemp9/devicetree.cb M src/soc/intel/cannonlake/chip.h M src/soc/intel/cannonlake/fsp_params.c 5 files changed, 9 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/44994/1
diff --git a/src/mainboard/prodrive/hermes/devicetree.cb b/src/mainboard/prodrive/hermes/devicetree.cb index 5615554..69323f2 100644 --- a/src/mainboard/prodrive/hermes/devicetree.cb +++ b/src/mainboard/prodrive/hermes/devicetree.cb @@ -28,7 +28,7 @@ register "HeciEnabled" = "1" end device pci 16.1 on end # Management Engine Interface 2 - device pci 16.4 off end # Management Engine Interface 3 + device pci 16.4 on end # Management Engine Interface 3 device pci 17.0 on end # SATA device pci 1d.6 on # PCIe root port 15 device pci 00.0 on # Aspeed PCI Bridge diff --git a/src/mainboard/purism/librem_whl/devicetree.cb b/src/mainboard/purism/librem_whl/devicetree.cb index b85e10f..fc3f418 100644 --- a/src/mainboard/purism/librem_whl/devicetree.cb +++ b/src/mainboard/purism/librem_whl/devicetree.cb @@ -277,7 +277,9 @@ device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R device pci 16.3 off end # Management Engine KT Redirection - device pci 16.4 off end # Management Engine Interface 3 + device pci 16.4 off # Management Engine Interface 3 + register "Heci3Enabled" = "0" + end device pci 16.5 off end # Management Engine Interface 4 device pci 17.0 on end # SATA device pci 19.0 off end # I2C #4 diff --git a/src/mainboard/system76/lemp9/devicetree.cb b/src/mainboard/system76/lemp9/devicetree.cb index e9e3aa3..c07b687 100644 --- a/src/mainboard/system76/lemp9/devicetree.cb +++ b/src/mainboard/system76/lemp9/devicetree.cb @@ -201,7 +201,9 @@ device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R device pci 16.3 off end # Management Engine KT Redirection - device pci 16.4 off end # Management Engine Interface 3 + device pci 16.4 off # Management Engine Interface 3 + register "Heci3Enabled" = "0" + end device pci 16.5 off end # Management Engine Interface 4 device pci 17.0 on end # SATA device pci 19.0 off end # I2C #4 diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h index 9e7aa45..e5ceac9 100644 --- a/src/soc/intel/cannonlake/chip.h +++ b/src/soc/intel/cannonlake/chip.h @@ -228,6 +228,7 @@ uint8_t PchIshEnable;
/* Heci related */ + uint8_t Heci3Enabled; uint8_t DisableHeciRetry;
/* Gfx related */ diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c index 615a94f..51ed2a8 100644 --- a/src/soc/intel/cannonlake/fsp_params.c +++ b/src/soc/intel/cannonlake/fsp_params.c @@ -525,8 +525,7 @@ else params->ScsUfsEnabled = dev->enabled;
- dev = pcidev_path_on_root(PCH_DEVFN_CSE_3); - params->Heci3Enabled = is_dev_enabled(dev); + params->Heci3Enabled = config->Heci3Enabled; #if !CONFIG(HECI_DISABLE_USING_SMM) dev = pcidev_path_on_root(PCH_DEVFN_CSE); params->Heci1Disabled = !is_dev_enabled(dev);
Hello Felix Singer, build bot (Jenkins), Nico Huber, Jeremy Soller, Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44994
to look at the new patch set (#2).
Change subject: Revert "soc/intel/cnl: Enable HECI3 depending on devicetree" ......................................................................
Revert "soc/intel/cnl: Enable HECI3 depending on devicetree"
This reverts commit d9e459428de519c89b23f9a7465bcb7b835c08a0.
Reason for revert: The Fsp option is not meant to be set from a devicetree but is to be set from a Hob in the resume path.
Change-Id: I1469ce3443e70c1ee5c841846ddeae7d4eebb9e5 --- M src/mainboard/prodrive/hermes/devicetree.cb M src/mainboard/purism/librem_whl/devicetree.cb M src/mainboard/system76/lemp9/devicetree.cb M src/soc/intel/cannonlake/chip.h M src/soc/intel/cannonlake/fsp_params.c 5 files changed, 9 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/44994/2
Hello Felix Singer, build bot (Jenkins), Nico Huber, Jeremy Soller, Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44994
to look at the new patch set (#3).
Change subject: Revert "soc/intel/cnl: Enable HECI3 depending on devicetree" ......................................................................
Revert "soc/intel/cnl: Enable HECI3 depending on devicetree"
This reverts commit d9e459428de519c89b23f9a7465bcb7b835c08a0.
Reason for revert: The Fsp option is not meant to be set from a devicetree but is to be set from a Hob in the resume path.
Change-Id: I1469ce3443e70c1ee5c841846ddeae7d4eebb9e5 --- M src/mainboard/prodrive/hermes/devicetree.cb M src/mainboard/purism/librem_whl/devicetree.cb M src/mainboard/system76/lemp9/devicetree.cb M src/soc/intel/cannonlake/chip.h M src/soc/intel/cannonlake/fsp_params.c 5 files changed, 9 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/44994/3
Michael Niewöhner has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/44994 )
Change subject: Revert "soc/intel/cnl: Enable HECI3 depending on devicetree" ......................................................................
Abandoned
let's drop Heci3Enabled completely
-
Michael Niewöhner (Code Review)