John Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39526 )
Change subject: src/include/device: Add Intel Tiger Lake Thunderbolt device Id ......................................................................
src/include/device: Add Intel Tiger Lake Thunderbolt device Id
Tiger Lake Thunderbolt(TBT) has 4 root ports. Add those TBT root port devices Id.
Change-Id: Ia117d63daa15dfb21db28fd76723e97ab030da92 Signed-off-by: John Zhao john.zhao@intel.com --- M src/include/device/pci_ids.h 1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/39526/1
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index ccbfe40..712210f 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3623,6 +3623,12 @@ #define PCI_DEVICE_ID_INTEL_CMP_EMMC 0x02c4 #define PCI_DEVICE_ID_INTEL_JSP_EMMC 0x4dc4
+/* Intel Thunderbolt device Ids */ +#define PCI_DEVICE_ID_INTEL_TGL_TBT_RP0 0x9a23 +#define PCI_DEVICE_ID_INTLE_TGL_TBT_RP1 0x9a25 +#define PCI_DEVICE_ID_INTEL_TGL_TBT_RP2 0x9a27 +#define PCI_DEVICE_ID_INTEL_TGL_TBT_RP3 0x9a29 + /* Intel WIFI Ids */ #define PCI_DEVICE_ID_1000_SERIES_WIFI 0x0084 #define PCI_DEVICE_ID_6005_SERIES_WIFI 0x0085
Hello build bot (Jenkins), Wonkyu Kim, Caveh Jalali, Nick Vaccaro, Brandon Breitenstein, Divya S Sasidharan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39526
to look at the new patch set (#2).
Change subject: src/include/device: Add Intel Tiger Lake Thunderbolt device Id ......................................................................
src/include/device: Add Intel Tiger Lake Thunderbolt device Id
Tiger Lake Thunderbolt(TBT) has 4 root ports. Add those TBT root port devices Id.
Change-Id: Ia117d63daa15dfb21db28fd76723e97ab030da92 Signed-off-by: John Zhao john.zhao@intel.com --- M src/include/device/pci_ids.h 1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/39526/2
Divya S Sasidharan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39526 )
Change subject: src/include/device: Add Intel Tiger Lake Thunderbolt device Id ......................................................................
Patch Set 2: Code-Review+1
Hello build bot (Jenkins), Wonkyu Kim, Caveh Jalali, Nick Vaccaro, Brandon Breitenstein, Divya S Sasidharan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39526
to look at the new patch set (#3).
Change subject: src/include/device: Add Intel Tiger Lake Thunderbolt device Id ......................................................................
src/include/device: Add Intel Tiger Lake Thunderbolt device Id
Tiger Lake Thunderbolt(TBT) has 4 PCIe root ports. Add those TBT root port devices Id from EDS #575683.
BUG=None TEST=built image and booted to kernel successfully.
Change-Id: Ia117d63daa15dfb21db28fd76723e97ab030da92 Signed-off-by: John Zhao john.zhao@intel.com --- M src/include/device/pci_ids.h 1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/39526/3
Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39526 )
Change subject: src/include/device: Add Intel Tiger Lake Thunderbolt device Id ......................................................................
Patch Set 3: Code-Review+1
Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39526 )
Change subject: src/include/device: Add Intel Tiger Lake Thunderbolt device Id ......................................................................
Patch Set 3: Code-Review+2
Srinidhi N Kaushik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39526 )
Change subject: src/include/device: Add Intel Tiger Lake Thunderbolt device Id ......................................................................
Patch Set 3: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39526 )
Change subject: src/include/device: Add Intel Tiger Lake Thunderbolt device Id ......................................................................
src/include/device: Add Intel Tiger Lake Thunderbolt device Id
Tiger Lake Thunderbolt(TBT) has 4 PCIe root ports. Add those TBT root port devices Id from EDS #575683.
BUG=None TEST=built image and booted to kernel successfully.
Change-Id: Ia117d63daa15dfb21db28fd76723e97ab030da92 Signed-off-by: John Zhao john.zhao@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/39526 Reviewed-by: Caveh Jalali caveh@chromium.org Reviewed-by: Wonkyu Kim wonkyu.kim@intel.com Reviewed-by: Srinidhi N Kaushik srinidhi.n.kaushik@intel.com Reviewed-by: Divya S Sasidharan divya.s.sasidharan@intel.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/include/device/pci_ids.h 1 file changed, 6 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Divya S Sasidharan: Looks good to me, but someone else must approve Srinidhi N Kaushik: Looks good to me, approved Caveh Jalali: Looks good to me, but someone else must approve Wonkyu Kim: Looks good to me, approved
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 3da326b..8d634f8 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3624,6 +3624,12 @@ #define PCI_DEVICE_ID_INTEL_CMP_EMMC 0x02c4 #define PCI_DEVICE_ID_INTEL_JSP_EMMC 0x4dc4
+/* Intel Thunderbolt device Ids */ +#define PCI_DEVICE_ID_INTEL_TGL_TBT_RP0 0x9a23 +#define PCI_DEVICE_ID_INTEL_TGL_TBT_RP1 0x9a25 +#define PCI_DEVICE_ID_INTEL_TGL_TBT_RP2 0x9a27 +#define PCI_DEVICE_ID_INTEL_TGL_TBT_RP3 0x9a29 + /* Intel WIFI Ids */ #define PCI_DEVICE_ID_1000_SERIES_WIFI 0x0084 #define PCI_DEVICE_ID_6005_SERIES_WIFI 0x0085