Attention is currently required from: Subrata Banik, Simon Chou, TimLiu-SMCI, Jonathan Zhang, Johnny Lin, Paul Menzel, David Hendricks, Christian Walter, Angel Pons, Jian-Ming Wang, Arthur Heymans, Elyes Haouas.
Shuming Chu (Shuming) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71945 )
Change subject: soc/intel/xeon_sp: add ebg (Emmitsburg PCH) directory ......................................................................
Patch Set 11:
(4 comments)
File src/soc/intel/xeon_sp/ebg/include/soc/gpio_soc_defs.h:
https://review.coreboot.org/c/coreboot/+/71945/comment/5e3bbfdd_ffed6f19 PS8, Line 88: #define SPI0_IO_2 45 : #define SPI0_IO_3 46 : #define SPI0_MOSI_IO_0 47 : #define SPI0_MOSI_IO_1 48 : #define SPI0_TPM_CSB 49 : #define SPI0_FLASH_0_CSB 50 : #define SPI0_FLASH_2_CSB 51 : #define SPI0_CLK 52
Tim, could you check this?
These fields are not defined in EDS, but I can find them while using Cscript. I remove these fields but keep the order here. Also add comment here to explain the reason why the order is kept.
https://review.coreboot.org/c/coreboot/+/71945/comment/c6e7f993_0d6ef270 PS8, Line 187: #define GPP_E20 132 : #define GPP_E21 133 : #define GPP_E22 134 : #define GPP_E23 135
Tim, could you check this?
These fields are not defined in EDS but can be found while using Cscript. I keep them here to make the order correct. These fields are also mentioned in EDS 13.9.1. Is it necessary to remove them?
https://review.coreboot.org/c/coreboot/+/71945/comment/8a2b3d26_5488aa27 PS8, Line 192: GPP_E23
GPP_E19
Although GPP_E23 is not defined in EDS but it does exist, should we change this to GPP_E19?
File src/soc/intel/xeon_sp/ebg/include/soc/gpio_soc_defs.h:
https://review.coreboot.org/c/coreboot/+/71945/comment/61319960_d5aa37f9 PS6, Line 374: #define GPIO_DRIVER_IRQ_ROUTE_MASK 8 : #define GPIO_DRIVER_IRQ_ROUTE_IRQ14 0 : #define GPIO_DRIVER_IRQ_ROUTE_IRQ15 8
Tim, could you check this?
I removed these definitions.
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Shuming Chu (Shuming) (Code Review)