Change in coreboot[master]: src/mainboard/intel/cannonlake: Add gpio support for cannonlake
Pratikkumar V Prajapati has posted comments on this change. ( https://review.coreboot.org/21139 )
Change subject: src/mainboard/intel/cannonlake: Add gpio support for cannonlake ......................................................................
Patch Set 1:
(7 comments)
https://review.coreboot.org/#/c/21139/1/src/mainboard/intel/cannonlake_rvp/c... File src/mainboard/intel/cannonlake_rvp/chromeos.c:
https://review.coreboot.org/#/c/21139/1/src/mainboard/intel/cannonlake_rvp/c... PS1, Line 21: #include <vendorcode/google/chromeos/chromeos.h> : : #include <variant/gpio.h> order?
https://review.coreboot.org/#/c/21139/1/src/mainboard/intel/cannonlake_rvp/v... File src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c:
https://review.coreboot.org/#/c/21139/1/src/mainboard/intel/cannonlake_rvp/v... PS1, Line 24: /* A1 : ESPI_IO_0 */ : /* A2 : ESPI_IO_1 */ : /* A3 : ESPI_IO_2 */ : /* A4 : ESPI_IO_3 */ : /* A5 : ESPI_CSB */ : /* A6 : SERIRQ */ tabs at beginning.
https://review.coreboot.org/#/c/21139/1/src/mainboard/intel/cannonlake_rvp/v... PS1, Line 30: /* A7 : PRIQAB_GSP10_CS1B */ : PAD_CFG_GPI_ACPI_SCI(GPP_A7, 20K_PU, PLTRST, NONE), i think you should put the comment after macro for the same pin.
e.g. PAD_CFG_GPI_ACPI_SCI(GPP_A7, 20K_PU, PLTRST, NONE), /* A7 : PRIQAB_GSP10_CS1B */
https://review.coreboot.org/#/c/21139/1/src/mainboard/intel/cannonlake_rvp/v... PS1, Line 71: /* B6 : SRCCLKREQB_1 */ : /* B7 : SRCCLKREQB_2 */ : /* B8 : SRCCLKREQB_3 */ : /* B9 : SRCCLKREQB_4 */ : /* B10 : SRCCLKREQB_5 */ : /* B11 : EXT_PWR_GATEB */ white chars at end of line
https://review.coreboot.org/#/c/21139/1/src/mainboard/intel/cannonlake_rvp/v... PS1, Line 133: remove extra tab
https://review.coreboot.org/#/c/21139/1/src/mainboard/intel/cannonlake_rvp/v... PS1, Line 261: white char
https://review.coreboot.org/#/c/21139/1/src/mainboard/intel/cannonlake_rvp/v... File src/mainboard/intel/cannonlake_rvp/variants/baseboard/include/baseboard/variants.h:
https://review.coreboot.org/#/c/21139/1/src/mainboard/intel/cannonlake_rvp/v... PS1, Line 23: /* : * The next set of functions return the gpio table and fill in the number of : * entries for each table. : */ /* The next set of functions return the gpio table and fill in the number of * entries for each table. */
-
Pratikkumar V Prajapati (Code Review)