New patch to review for coreboot: 5715f22 NOTFORMERGE: x60, x201: Read EDID rather than hardcoding.
Vladimir Serbinenko (phcoder@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5250
-gerrit
commit 5715f22533f32a2cbf33476a2ca95decf3f0adc1 Author: Vladimir Serbinenko phcoder@gmail.com Date: Sun Feb 16 03:42:22 2014 +0100
NOTFORMERGE: x60, x201: Read EDID rather than hardcoding.
Change-Id: I023b6793dd0d35292993192fc006b21accbdab49 Signed-off-by: Vladimir Serbinenko phcoder@gmail.com --- src/drivers/intel/Makefile.inc | 1 + src/drivers/intel/gma/Kconfig | 4 + src/drivers/intel/gma/Makefile.inc | 2 +- src/drivers/intel/gma/edid.c | 79 ++++++++++ src/drivers/intel/gma/edid.h | 2 + src/mainboard/lenovo/x60/Kconfig | 1 + src/mainboard/lenovo/x60/i915.c | 14 +- src/northbridge/intel/nehalem/Kconfig | 1 + src/northbridge/intel/nehalem/fake_vbios.c | 232 +---------------------------- src/northbridge/intel/nehalem/gma.c | 17 +++ src/northbridge/intel/nehalem/nehalem.h | 1 - 11 files changed, 111 insertions(+), 243 deletions(-)
diff --git a/src/drivers/intel/Makefile.inc b/src/drivers/intel/Makefile.inc index 82d5449..7cce77e 100644 --- a/src/drivers/intel/Makefile.inc +++ b/src/drivers/intel/Makefile.inc @@ -1 +1,2 @@ subdirs-$(CONFIG_INTEL_DP) += gma +subdirs-$(CONFIG_INTEL_EDID) += gma diff --git a/src/drivers/intel/gma/Kconfig b/src/drivers/intel/gma/Kconfig index 073f708..c9c1bca 100644 --- a/src/drivers/intel/gma/Kconfig +++ b/src/drivers/intel/gma/Kconfig @@ -28,3 +28,7 @@ config INTEL_DDI default n help helper functions for intel DDI operations + +config INTEL_EDID + bool + default n \ No newline at end of file diff --git a/src/drivers/intel/gma/Makefile.inc b/src/drivers/intel/gma/Makefile.inc index 0c3f45a..bea597e 100644 --- a/src/drivers/intel/gma/Makefile.inc +++ b/src/drivers/intel/gma/Makefile.inc @@ -19,4 +19,4 @@
ramstage-$(CONFIG_INTEL_DP) += intel_dp.c drm_dp_helper.c ramstage-$(CONFIG_INTEL_DDI) += intel_ddi.c - +ramstage-$(CONFIG_INTEL_EDID) += edid.c diff --git a/src/drivers/intel/gma/edid.c b/src/drivers/intel/gma/edid.c new file mode 100644 index 0000000..f712e7d --- /dev/null +++ b/src/drivers/intel/gma/edid.c @@ -0,0 +1,79 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Vladimir Serbinenko phcoder@gmail.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2, or (at your option) + * any later verion of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <console/console.h> +#include <delay.h> + +#include "i915.h" +#include "i915_reg.h" +#include "edid.h" + +static void +wait_rdy(void) +{ + unsigned try = 100; + + while (try--) { + if (io_i915_read32(PCH_GMBUS2) & (1 << 11)) + return; + udelay(10); + } +} + +void +intel_gmbus_read_edid(u8 bus, u8 slave, u8 *edid) +{ + int i; + + wait_rdy(); + /* 100 KHz, hold 0ns, */ + io_i915_write32(bus, PCH_GMBUS0); + wait_rdy(); + /* Ensure index bits are disabled. */ + io_i915_write32(0, PCH_GMBUS5); + io_i915_write32(0x46000000 | (slave << 1), PCH_GMBUS1); + wait_rdy(); + /* Ensure index bits are disabled. */ + io_i915_write32(0, PCH_GMBUS5); + io_i915_write32(0x4a800001 | (slave << 1), PCH_GMBUS1); + for (i = 0; i < 128 / 4; i++) { + u32 reg32; + wait_rdy(); + reg32 = io_i915_read32(PCH_GMBUS3); + edid[4 * i] = reg32 & 0xff; + edid[4 * i + 1] = (reg32 >> 8) & 0xff; + edid[4 * i + 2] = (reg32 >> 16) & 0xff; + edid[4 * i + 3] = (reg32 >> 24) & 0xff; + } + wait_rdy(); + io_i915_write32(0x4a800000 | (slave << 1), PCH_GMBUS1); + wait_rdy(); + io_i915_write32(0x48000000, PCH_GMBUS0); + io_i915_write32(0x00008000, PCH_GMBUS2); + + printk (BIOS_INFO, "EDID:\n"); + for (i = 0; i < 128; i++) { + printk (BIOS_INFO, "%02x ", edid[i]); + if ((i & 0xf) == 0xf) + printk (BIOS_INFO, "\n"); + } +} diff --git a/src/drivers/intel/gma/edid.h b/src/drivers/intel/gma/edid.h new file mode 100644 index 0000000..d5d5244 --- /dev/null +++ b/src/drivers/intel/gma/edid.h @@ -0,0 +1,2 @@ +void +intel_gmbus_read_edid(u8 bus, u8 slave, u8 *edid); diff --git a/src/mainboard/lenovo/x60/Kconfig b/src/mainboard/lenovo/x60/Kconfig index 7ed2665..977d9e5 100644 --- a/src/mainboard/lenovo/x60/Kconfig +++ b/src/mainboard/lenovo/x60/Kconfig @@ -26,6 +26,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MAINBOARD_HAS_NATIVE_VGA_INIT select EARLY_CBMEM_INIT select H8_DOCK_EARLY_INIT + select INTEL_EDID
config MAINBOARD_DIR string diff --git a/src/mainboard/lenovo/x60/i915.c b/src/mainboard/lenovo/x60/i915.c index 4870fd8..abff0ca 100644 --- a/src/mainboard/lenovo/x60/i915.c +++ b/src/mainboard/lenovo/x60/i915.c @@ -64,16 +64,6 @@ static unsigned int physbase;
static u32 htotal, hblank, hsync, vtotal, vblank, vsync;
-const u8 x60_edid_data[] = { - 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0xae, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x0f, 0x01, 0x03, 0x80, 0x19, 0x12, 0x78, 0xea, 0xed, 0x75, 0x91, 0x57, 0x4f, 0x8b, 0x26, - 0x21, 0x50, 0x54, 0x21, 0x08, 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, - 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x28, 0x15, 0x00, 0x40, 0x41, 0x00, 0x26, 0x30, 0x18, 0x88, - 0x36, 0x00, 0xf6, 0xb9, 0x00, 0x00, 0x00, 0x18, 0xed, 0x10, 0x00, 0x40, 0x41, 0x00, 0x26, 0x30, - 0x18, 0x88, 0x36, 0x00, 0xf6, 0xb9, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x61, - 0x43, 0x32, 0x61, 0x43, 0x28, 0x0f, 0x01, 0x00, 0x4c, 0xa3, 0x58, 0x4a, 0x00, 0x00, 0x00, 0xfe, - 0x00, 0x4c, 0x54, 0x4e, 0x31, 0x32, 0x31, 0x58, 0x4a, 0x2d, 0x4c, 0x30, 0x37, 0x0a, 0x00, 0x00, -}; #define READ32(addr) io_i915_READ32(addr) #define WRITE32(val, addr) io_i915_WRITE32(val, addr)
@@ -279,6 +269,7 @@ int i915lightup(unsigned int pphysbase, unsigned int piobase, unsigned int pmmio, unsigned int pgfx) { static struct edid edid; + static u8 x60_edid_data[128];
int index; unsigned long temp; @@ -293,7 +284,8 @@ int i915lightup(unsigned int pphysbase, unsigned int piobase, globalstart = rdtscll();
- decode_edid((unsigned char *)&x60_edid_data, + intel_gmbus_read_edid(3, 0x50, x60_edid_data); + decode_edid(x60_edid_data, sizeof(x60_edid_data), &edid);
htotal = (edid.ha - 1) | ((edid.ha + edid.hbl - 1) << 16); diff --git a/src/northbridge/intel/nehalem/Kconfig b/src/northbridge/intel/nehalem/Kconfig index 69d0eee..4cbaf22 100644 --- a/src/northbridge/intel/nehalem/Kconfig +++ b/src/northbridge/intel/nehalem/Kconfig @@ -23,6 +23,7 @@ config NORTHBRIDGE_INTEL_NEHALEM select MMCONF_SUPPORT select MMCONF_SUPPORT_DEFAULT select VGA + select INTEL_EDID
if NORTHBRIDGE_INTEL_NEHALEM
diff --git a/src/northbridge/intel/nehalem/fake_vbios.c b/src/northbridge/intel/nehalem/fake_vbios.c index 5daf5ff..2aae2e3 100644 --- a/src/northbridge/intel/nehalem/fake_vbios.c +++ b/src/northbridge/intel/nehalem/fake_vbios.c @@ -320,236 +320,8 @@ inb(0x03c8); // Device I/O --> 00 outb(0x01, 0x03c4); // Device I/O <-- inw(0x03c4); // Device I/O --> 0x2001 outw(0x2001, 0x03c4); // Device I/O -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000800 -outl(0x000c5100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000003, 0x1044); // Device I/O -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008800 -outl(0x000c5120, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x000c5104, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x460000a0, 0x1044); // Device I/O -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000ca00 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000ca00 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0000ca00 -outl(0x000c5120, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x00000000, 0x1044); // Device I/O -outl(0x000c5104, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 060000a0 -outl(0x4a8000a1, 0x1044); // Device I/O -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a08 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a08 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> ffffff00 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a0c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a0c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00ffffff -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a10 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a10 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 4011ae30 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a14 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a14 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000000 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a18 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a18 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 03011300 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a1c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a1c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 78101a80 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a20 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a20 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 9795baea -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a24 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a24 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 278c5559 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a28 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a28 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00545021 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a2c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a2c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01010000 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a30 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a30 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01010101 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a34 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a34 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01010101 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a38 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a38 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01010101 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a3c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a3c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 1b120101 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a40 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a40 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 20508000 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a44 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a44 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 20183014 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a48 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a48 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> a3050044 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a4c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a4c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 1f000010 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a50 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a50 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 80001693 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a54 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a54 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 30142050 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a58 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a58 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00442018 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a5c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a5c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0010a305 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a60 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a60 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00001f00 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a64 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a64 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 81000f00 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a68 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a68 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 0a813c0a -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a6c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a6c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00091632 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a70 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a70 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 01f0e430 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a74 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a74 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> fe000000 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a78 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a78 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 31504c00 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a7c -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008a7c -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 58573132 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008800 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008800 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 4c542d33 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008800 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008800 -outl(0x000c510c, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> ac003143 -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008000 -outl(0x000c5104, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 028000a1 -outl(0x480000a0, 0x1044); // Device I/O -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008000 -outl(0x000c5100, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00000003 -outl(0x48000000, 0x1044); // Device I/O -outl(0x000c5108, 0x1040); // Device I/O -inl(0x1044); // Device I/O --> 00008000 -outl(0x00008000, 0x1044); // Device I/O +u8 edid[128]; +intel_gmbus_read_edid(3, 0x50, edid); outb(0x01, 0x03c4); // Device I/O <-- inw(0x03c4); // Device I/O --> 0x2001 outw(0x0001, 0x03c4); // Device I/O diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c index 2f13a6b..4d304f3 100644 --- a/src/northbridge/intel/nehalem/gma.c +++ b/src/northbridge/intel/nehalem/gma.c @@ -28,6 +28,8 @@ #include <device/pci_ops.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> +#include <drivers/intel/gma/edid.h> +#include <drivers/intel/gma/i915.h>
#include "chip.h" #include "nehalem.h" @@ -549,6 +551,21 @@ static void gma_pm_init_pre_vbios(struct device *dev) #include <pc80/vga_io.h>
#if CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT + +/* The mainboard must provide these functions. */ +unsigned long io_i915_read32(unsigned long addr) +{ + outl(addr, 0x1040); + return inl(0x1044); +} +void io_i915_write32(unsigned long val, unsigned long addr) +{ + outl(addr, 0x1040); + inl(0x1044); + outl(val, 0x1044); +} + + static void fake_vbios(void) { #include "fake_vbios.c" diff --git a/src/northbridge/intel/nehalem/nehalem.h b/src/northbridge/intel/nehalem/nehalem.h index e79a343..60cafdf 100644 --- a/src/northbridge/intel/nehalem/nehalem.h +++ b/src/northbridge/intel/nehalem/nehalem.h @@ -504,7 +504,6 @@ void init_iommu(void); #define MCHBAR32(x) *((volatile u32 *)(DEFAULT_MCHBAR + x)) #define MCHBAR32_OR(x, or) MCHBAR32(x) = (MCHBAR32(x) | (or))
-#define SSKPD 0x5d14 /* 16bit (scratchpad) */ #define BIOS_RESET_CPL 0x5da8 /* 8bit */
/*
-
Vladimir Serbinenko