Change in coreboot[master]: nocturne: Do not set 4 LSB of SX9310 CRTL0

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/27265 )

Change subject: nocturne: Do not set 4 LSB of SX9310 CRTL0
......................................................................

nocturne: Do not set 4 LSB of SX9310 CRTL0

These bits start the acquisition process. They should only be set by the
driver.

BUG=b:74363445
TEST=compile

Change-Id: I9e10f5570ac82124f7f4b5cc7aaad27da0c578be
Signed-off-by: Gwendal Grignou 
Reviewed-on: https://review.coreboot.org/27265
Tested-by: build bot (Jenkins) 
Reviewed-by: Furquan Shaikh 
---
M src/mainboard/google/poppy/variants/nocturne/devicetree.cb
1 file changed, 2 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Furquan Shaikh: Looks good to me, approved

diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
index 09b7ef9..17bd3c0 100644
--- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
+++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb
@@ -305,7 +305,7 @@
    			register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D9_IRQ)"
    			register "speed" = "I2C_SPEED_FAST_PLUS"
    			register "uid" = "0"
-				register "reg_prox_ctrl0" = "0x1a"
+				register "reg_prox_ctrl0" = "0x10"
    			register "reg_prox_ctrl1" = "0x00"
    			register "reg_prox_ctrl2" = "0x84"
    			register "reg_prox_ctrl3" = "0x0e"
@@ -346,7 +346,7 @@
    			register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D10_IRQ)"
    			register "speed" = "I2C_SPEED_FAST_PLUS"
    			register "uid" = "1"
-				register "reg_prox_ctrl0" = "0x1a"
+				register "reg_prox_ctrl0" = "0x10"
    			register "reg_prox_ctrl1" = "0x00"
    			register "reg_prox_ctrl2" = "0x84"
    			register "reg_prox_ctrl3" = "0x0e"