[L] Change in coreboot[main]: mb/dell: Add Latitude E6430 (Ivy Bridge)

[Nicholas Chin (Code Review)]

Attention is currently required from: Felix Singer, Martin L Roth, Paul Menzel.

Nicholas Chin has posted comments on this change by Nicholas Chin. ( https://review.coreboot.org/c/coreboot/+/77444?usp=email )

Change subject: mb/dell: Add Latitude E6430 (Ivy Bridge)
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Patch Set 13:

(11 comments)

File src/mainboard/dell/snb_ivb_latitude/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/77444/comment/5f61aeee_9dc76b4b?usp... :
PS12, Line 4: 	register "gfx" = "GMA_STATIC_DISPLAYS(1)"
            : 	register "gpu_dp_b_hotplug" = "4"
            : 	register "gpu_dp_c_hotplug" = "4"
            : 	register "gpu_dp_d_hotplug" = "4"
            : 	register "gpu_panel_port_select" = "0"
            : 	register "gpu_panel_power_backlight_off_delay" = "2300"
            : 	register "gpu_panel_power_backlight_on_delay" = "2300"
            : 	register "gpu_panel_power_cycle_delay" = "6"
            : 	register "gpu_panel_power_down_delay" = "400"
            : 	r
> Move into igpu device scope

Done

https://review.coreboot.org/c/coreboot/+/77444/comment/fb331285_1863f30b?usp... :
PS12, Line 18: 		device ref host_bridge on end
> Already enabled in chipset devicetree, remove

Done

https://review.coreboot.org/c/coreboot/+/77444/comment/f09674b3_e20ff643?usp... :
PS12, Line 19: 		device ref peg10 off end
> Disabled in chipset devicetree, remove

Done

https://review.coreboot.org/c/coreboot/+/77444/comment/87411fcc_cb929630?usp... :
PS12, Line 24: 			register "gen1_dec" = "0x007c0681"
             : 			register "gen2_dec" = "0x005c0921"
             : 			register "gen3_dec" = "0x003c07e1"
             :
> Move into lpc device scope.

Done

https://review.coreboot.org/c/coreboot/+/77444/comment/7ef57c98_81688f29?usp... :
PS12, Line 31: 			register "sata_interface_speed_support" = "0x3"
             :
> Move into SATA device scope

Done

https://review.coreboot.org/c/coreboot/+/77444/comment/44547ff7_6c205d3b?usp... :
PS12, Line 36: 			device ref mei1		on end
> Enabled in chipset devicetree, remove

Done

https://review.coreboot.org/c/coreboot/+/77444/comment/f7b387d3_c0a055ce?usp... :
PS12, Line 37: 			device ref mei2		off end
             :
> Disabled in chipset devicetree, remove

Done

https://review.coreboot.org/c/coreboot/+/77444/comment/a29a9e14_de15d6f9?usp... :
PS12, Line 49: 			device ref pcie_rp7	off end
             :
> Disabled in chipset devicetree, remove

Done

https://review.coreboot.org/c/coreboot/+/77444/comment/5b715585_9f3ab572?usp... :
PS12, Line 52: 			device ref pci_bridge	off end
> Disabled in chipset devicetree, remove

Done

https://review.coreboot.org/c/coreboot/+/77444/comment/b0af0204_9b09a831?usp... :
PS12, Line 59: 			device ref smbus	on end
> Enabled in chipset devicetree, remove

Done

https://review.coreboot.org/c/coreboot/+/77444/comment/358797de_16806231?usp... :
PS12, Line 60: 			device ref sata2	off end
             :
> Disabled in chipset devicetree, remove

Done